src/mainboard/clevo/kbl-u/variants/n13xwu/devicetree.cb

   1 # SPDX-License-Identifier: GPL-2.0-only
   2
   3 chip soc/intel/skylake
   4         register "panel_cfg" = "{
   5                 .up_delay_ms            = 200,  // T3
   6                 .down_delay_ms          =   0,  // T10
   7                 .cycle_delay_ms         = 500,  // T12
   8                 .backlight_on_delay_ms  =  50,  // T7
   9                 .backlight_off_delay_ms =   0,  // T9
  10                 .backlight_pwm_hz       = 200,
  11         }"
  12
  13         # IGD Displays
  14         register "gfx" = "GMA_STATIC_DISPLAYS(0)"
  15
  16         # FSP Configuration
  17         register "SkipExtGfxScan" = "1"
  18         register "SaGv" = "SaGv_Enabled"
  19         register "eist_enable" = "true"
  20
  21         register "PmConfigSlpS3MinAssert" = "2"         # 50ms
  22         register "PmConfigSlpS4MinAssert" = "1"         # 1s
  23         register "PmConfigSlpSusMinAssert" = "3"        # 500ms
  24         register "PmConfigSlpAMinAssert" = "3"          # 2s
  25
  26         # Send an extra VR mailbox command for the PS4 exit issue
  27         register "SendVrMbxCmd" = "2"
  28
  29         register "power_limits_config" = "{
  30                 .tdp_pl1_override = 20,
  31                 .tdp_pl2_override = 30,
  32         }"
  33
  34         register "SerialIoDevMode" = "{
  35                 [PchSerialIoIndexUart2] = PchSerialIoSkipInit, // LPSS UART
  36         }"
  37
  38         device domain 0 on
  39                 subsystemid 0x1558 0x1313 inherit
  40                 device ref system_agent on      end
  41                 device ref igpu         on      end
  42                 device ref sa_thermal   on      end
  43                 device ref south_xhci   on
  44                         # USB2
  45                         register "usb2_ports[0]" = "USB2_PORT_MID(OC_SKIP)"     # Type-A, right
  46                         register "usb2_ports[1]" = "USB2_PORT_FLEX(OC_SKIP)"    # 3G / LTE
  47                         register "usb2_ports[2]" = "USB2_PORT_TYPE_C(OC_SKIP)"  # Type-C, right
  48                         register "usb2_ports[3]" = "USB2_PORT_FLEX(OC_SKIP)"    # Camera
  49                         register "usb2_ports[4]" = "USB2_PORT_FLEX(OC_SKIP)"    # Bluetooth
  50                         register "usb2_ports[6]" = "USB2_PORT_FLEX(OC_SKIP)"    # Type-A, left
  51                         register "usb2_ports[7]" = "USB2_PORT_TYPE_C(OC_SKIP)"  # Type-C, right
  52                         # USB3
  53                         register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-A, right
  54                         register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # 4G
  55                         register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type C, right
  56                         register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-A, left
  57                 end
  58                 device ref thermal      on      end
  59                 device ref heci1        on      end
  60                 device ref sata         on
  61                         # Ports
  62                         register "SataPortsEnable[0]" = "1"
  63                         register "SataPortsEnable[2]" = "1"
  64                         register "SataPortsDevSlp[2]" = "1"
  65                 end
  66                 device ref uart2        on      end
  67                 device ref pcie_rp1     on
  68                         device pci 00.0 on end # x4 TBT
  69                         register "PcieRpEnable[0]" = "1"
  70                         register "PcieRpClkReqSupport[0]" = "1"
  71                         register "PcieRpClkReqNumber[0]" = "4"
  72                         register "PcieRpClkSrcNumber[0]" = "4"
  73                         register "PcieRpHotPlug[0]" = "1"
  74                         register "PcieRpLtrEnable[0]" = "1"
  75                         smbios_slot_desc "SlotTypePciExpressGen3X4" "SlotLengthOther" "Thunderbolt/Type-C" "SlotDataBusWidth4X"
  76                 end
  77                 device ref pcie_rp5     on
  78                         device pci 00.0 on end # x1 LAN
  79                         register "PcieRpEnable[4]" = "1"
  80                         register "PcieRpClkReqSupport[4]" = "1"
  81                         register "PcieRpClkReqNumber[4]" = "3"
  82                         register "PcieRpClkSrcNumber[4]" = "3"
  83                         register "PcieRpLtrEnable[4]" = "1"
  84                 end
  85                 device ref pcie_rp6     on
  86                         device pci 00.0 on end # x1 WLAN
  87                         register "PcieRpEnable[5]" = "1"
  88                         register "PcieRpClkReqSupport[5]" = "1"
  89                         register "PcieRpClkReqNumber[5]" = "2"
  90                         register "PcieRpClkSrcNumber[5]" = "2"
  91                         register "PcieRpLtrEnable[5]" = "1"
  92                         smbios_slot_desc "SlotTypeM2Socket1_SD" "SlotLengthOther" "M.2/A/E 2230 (J_WLAN1)" "SlotDataBusWidth1X"
  93                 end
  94                 device ref pcie_rp9     on
  95                         device pci 00.0 on end # x4 M.2/M (J_SSD1)
  96                         register "PcieRpEnable[8]" = "1"
  97                         register "PcieRpClkReqSupport[8]" = "1"
  98                         register "PcieRpClkReqNumber[8]" = "5"
  99                         register "PcieRpClkSrcNumber[8]" = "5"
 100                         register "PcieRpLtrEnable[8]" = "1"
 101                         smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2/M 2280 (J_SSD1)" "SlotDataBusWidth4X"
 102                 end
 103                 device ref lpc_espi     on
 104                         register "gen1_dec" = "0x000c0681"
 105                         register "gen2_dec" = "0x000c1641"
 106                         register "gen3_dec" = "0x00040069"
 107                         register "serirq_mode" = "SERIRQ_CONTINUOUS"
 108                         chip drivers/pc80/tpm
 109                                 device pnp 0c31.0 on end
 110                         end
 111                 end
 112                 device ref p2sb         hidden  end
 113                 device ref pmc          on
 114                         register "gpe0_dw0" = "GPP_C"
 115                         register "gpe0_dw1" = "GPP_D"
 116                         register "gpe0_dw2" = "GPP_E"
 117                 end
 118                 device ref hda          on      end
 119                 device ref smbus        on      end
 120                 device ref fast_spi     on      end
 121         end
 122 end