mb/google/nissa/var/rull: add ssd timing and modify ssd GPIO pins of rtd3
[coreboot2.git] / src / mainboard / clevo / kbl-u / variants / n13xwu / hda_verb.c
blob68f4159dcae0324dce49dcebfdbe7aa64e0a5acf
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <device/azalia_device.h>
5 const u32 cim_verb_data[] = {
6 /* Realtek ALC269VC */
7 0x10ec0269,
8 0x15581314,
9 11,
10 AZALIA_SUBVENDOR(0, 0x15581314),
11 AZALIA_PIN_CFG(0, 0x12, 0x90a60140),
12 AZALIA_PIN_CFG(0, 0x14, 0x90170120),
13 AZALIA_PIN_CFG(0, 0x15, 0x02211010),
14 AZALIA_PIN_CFG(0, 0x17, 0x40000000),
15 AZALIA_PIN_CFG(0, 0x18, 0x02a11030),
16 AZALIA_PIN_CFG(0, 0x19, AZALIA_PIN_CFG_NC(0)),
17 AZALIA_PIN_CFG(0, 0x1a, AZALIA_PIN_CFG_NC(0)),
18 AZALIA_PIN_CFG(0, 0x1b, AZALIA_PIN_CFG_NC(0)),
19 AZALIA_PIN_CFG(0, 0x1d, 0x40f4a205),
20 AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
22 /* Intel iGPU HDMI */
23 0x8086280b,
24 0x80860101,
26 AZALIA_SUBVENDOR(2, 0x80860101),
27 AZALIA_PIN_CFG(2, 0x5, 0x18560010),
28 AZALIA_PIN_CFG(2, 0x6, 0x18560010),
29 AZALIA_PIN_CFG(2, 0x7, 0x18560010)
32 const u32 pc_beep_verbs[] = {};
34 AZALIA_ARRAY_SIZES;