mb/google/nissa/var/rull: add ssd timing and modify ssd GPIO pins of rtd3
[coreboot2.git] / src / mainboard / emulation / qemu-aarch64 / cbmem.c
blob3aac9bf71569b76df442a06b56ae7a6d306a2cc5
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 #include <cbmem.h>
4 #include <ramdetect.h>
5 #include <symbols.h>
6 #include <commonlib/device_tree.h>
8 DECLARE_REGION(fdt)
9 uintptr_t cbmem_top_chipset(void)
11 uint64_t top;
13 top = fdt_get_memory_top((void *)_fdt);
14 if (top)
15 return MIN(top, (uint64_t)4 * GiB - 1);
17 return (uintptr_t)_dram + (probe_ramsize((uintptr_t)_dram, CONFIG_DRAM_SIZE_MB) * MiB);