mb/google/nissa/var/rull: add ssd timing and modify ssd GPIO pins of rtd3

[coreboot2.git] / src / mainboard / emulation / qemu-aarch64 / devicetree.cb

# SPDX-License-Identifier: GPL-2.0-or-later

chip mainboard/emulation/qemu-aarch64
        device cpu_cluster 0 on end

        device domain 0 on ops qemu_aarch64_pci_domain_ops
                device pci 00.0 on end
        end
end