mb/google/nissa/var/rull: add ssd timing and modify ssd GPIO pins of rtd3
[coreboot2.git] / src / mainboard / emulation / qemu-armv7 / cbmem.c
blob5c423a05bbc26428190221463f3baac02b6ad4fd
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <cbmem.h>
4 #include <symbols.h>
5 #include <ramdetect.h>
7 uintptr_t cbmem_top_chipset(void)
9 return (uintptr_t)_dram + (probe_ramsize((uintptr_t)_dram, CONFIG_DRAM_SIZE_MB) * MiB);