mb/google/nissa/var/rull: add ssd timing and modify ssd GPIO pins of rtd3
[coreboot2.git] / src / mainboard / emulation / qemu-i440fx / fw_cfg_if.h
blob817d1a58f5d3ca5ccd499025f277aa5b2c52ce3e
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 /*
4 * These are the qemu firmware config interface defines and structs.
5 * Copied over from qemu source tree,
6 * include/standard-headers/linux/qemu_fw_cfg.h and modified accordingly.
7 */
8 #ifndef FW_CFG_IF_H
9 #define FW_CFG_IF_H
11 #include <stdint.h>
13 enum fw_cfg_enum {
14 FW_CFG_SIGNATURE,
15 FW_CFG_ID,
16 FW_CFG_UUID,
17 FW_CFG_RAM_SIZE,
18 FW_CFG_NOGRAPHIC,
19 FW_CFG_NB_CPUS,
20 FW_CFG_MACHINE_ID,
21 FW_CFG_KERNEL_ADDR,
22 FW_CFG_KERNEL_SIZE,
23 FW_CFG_KERNEL_CMDLINE,
24 FW_CFG_INITRD_ADDR,
25 FW_CFG_INITRD_SIZE,
26 FW_CFG_BOOT_DEVICE,
27 FW_CFG_NUMA,
28 FW_CFG_BOOT_MENU,
29 FW_CFG_MAX_CPUS,
30 FW_CFG_KERNEL_ENTRY,
31 FW_CFG_KERNEL_DATA,
32 FW_CFG_INITRD_DATA,
33 FW_CFG_CMDLINE_ADDR,
34 FW_CFG_CMDLINE_SIZE,
35 FW_CFG_CMDLINE_DATA,
36 FW_CFG_SETUP_ADDR,
37 FW_CFG_SETUP_SIZE,
38 FW_CFG_SETUP_DATA,
39 FW_CFG_FILE_DIR
42 #define FW_CFG_FILE_FIRST 0x20
43 #define FW_CFG_FILE_SLOTS 0x10
44 #define FW_CFG_MAX_ENTRY (FW_CFG_FILE_FIRST+FW_CFG_FILE_SLOTS)
46 #define FW_CFG_WRITE_CHANNEL 0x4000
47 #define FW_CFG_ARCH_LOCAL 0x8000
48 #define FW_CFG_ENTRY_MASK ~(FW_CFG_WRITE_CHANNEL | FW_CFG_ARCH_LOCAL)
50 #define FW_CFG_ACPI_TABLES (FW_CFG_ARCH_LOCAL + 0)
51 #define FW_CFG_SMBIOS_ENTRIES (FW_CFG_ARCH_LOCAL + 1)
52 #define FW_CFG_IRQ0_OVERRIDE (FW_CFG_ARCH_LOCAL + 2)
53 #define FW_CFG_E820_TABLE (FW_CFG_ARCH_LOCAL + 3)
54 #define FW_CFG_HPET (FW_CFG_ARCH_LOCAL + 4)
56 #define FW_CFG_INVALID 0xffff
58 /* width in bytes of fw_cfg control register */
59 #define FW_CFG_CTL_SIZE 0x02
61 /* fw_cfg "file name" is up to 56 characters (including terminating nul) */
62 #define FW_CFG_MAX_FILE_PATH 56
64 /* size in bytes of fw_cfg signature */
65 #define FW_CFG_SIG_SIZE 4
67 typedef struct FWCfgFile {
68 uint32_t size; /* file size */
69 uint16_t select; /* write this to 0x510 to read it */
70 uint16_t reserved;
71 char name[FW_CFG_MAX_FILE_PATH];
72 } __packed FWCfgFile;
74 typedef struct FWCfgFiles {
75 uint32_t count;
76 FWCfgFile f[];
77 } __packed FWCfgFiles;
79 typedef struct FwCfgE820Entry {
80 uint64_t address;
81 uint64_t length;
82 uint32_t type;
83 } __packed FwCfgE820Entry __attribute((__aligned__(4)));
86 #define SMBIOS_FIELD_ENTRY 0
87 #define SMBIOS_TABLE_ENTRY 1
89 typedef struct FwCfgSmbios {
90 uint16_t length;
91 uint8_t headertype;
92 uint8_t tabletype;
93 uint16_t fieldoffset;
94 } __packed FwCfgSmbios;
96 /* FW_CFG_ID bits */
97 #define FW_CFG_VERSION 0x01
98 #define FW_CFG_VERSION_DMA 0x02
100 /* FW_CFG_DMA_CONTROL bits */
101 #define FW_CFG_DMA_CTL_ERROR 0x01
102 #define FW_CFG_DMA_CTL_READ 0x02
103 #define FW_CFG_DMA_CTL_SKIP 0x04
104 #define FW_CFG_DMA_CTL_SELECT 0x08
105 #define FW_CFG_DMA_CTL_WRITE 0x10
107 #define FW_CFG_DMA_SIGNATURE 0x51454d5520434647ULL /* "QEMU CFG" */
109 /* Control as first field allows for different structures selected by this
110 * field, which might be useful in the future
112 typedef struct FwCfgDmaAccess {
113 uint32_t control;
114 uint32_t length;
115 uint64_t address;
116 } __packed FwCfgDmaAccess;
118 #endif /* FW_CFG_IF_H */