mb/google/nissa/var/rull: add ssd timing and modify ssd GPIO pins of rtd3
[coreboot2.git] / src / mainboard / emulation / qemu-riscv / cbmem.c
blobff3f5db3fc92543c25fecd3463accf0ee4d0caed
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <assert.h>
4 #include <cbmem.h>
5 #include <symbols.h>
6 #include <ramdetect.h>
7 #include <commonlib/device_tree.h>
8 #include <mcall.h>
10 uintptr_t cbmem_top_chipset(void)
12 uint64_t top;
14 top = fdt_get_memory_top((void *)HLS()->fdt);
15 ASSERT_MSG(top, "Failed reading memory range from FDT");
17 return MIN(top, (uint64_t)4 * GiB - 1);