mb/google/nissa/var/rull: add ssd timing and modify ssd GPIO pins of rtd3
[coreboot2.git] / src / mainboard / google / gru / Makefile.mk
blobb800945466811520c37459c80e9ecdf4be45da34
1 ## SPDX-License-Identifier: GPL-2.0-only
3 subdirs-y += sdram_params/
5 bootblock-y += bootblock.c
6 bootblock-y += chromeos.c
7 bootblock-y += pwm_regulator.c
8 bootblock-y += boardid.c
9 bootblock-y += reset.c
11 verstage-y += chromeos.c
12 verstage-y += reset.c
14 romstage-y += boardid.c
15 romstage-y += chromeos.c
16 romstage-y += pwm_regulator.c
17 romstage-y += romstage.c
18 romstage-y += reset.c
19 romstage-y += sdram_configs.c
21 ramstage-y += boardid.c
22 ramstage-y += chromeos.c
23 ramstage-y += mainboard.c
24 ramstage-y += reset.c
25 ramstage-y += sdram_configs.c # Needed for ram_code()