src/mainboard/google/herobrine/mainboard.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include "board.h"
   4 #include <boardid.h>
   5 #include <bootblock_common.h>
   6 #include <bootmode.h>
   7 #include <console/console.h>
   8 #include <delay.h>
   9 #include <device/device.h>
  10 #include <device/mmio.h>
  11 #include <ec/google/chromeec/ec.h>
  12 #include <edid.h>
  13 #include <soc/clock.h>
  14 #include <soc/display/mdssreg.h>
  15 #include <soc/display/edp_ctrl.h>
  16 #include <soc/pcie.h>
  17 #include <soc/qupv3_config_common.h>
  18 #include <soc/qup_se_handlers_common.h>
  19 #include <soc/qcom_qup_se.h>
  20 #include <soc/sdhci.h>
  21 #include <soc/usb/usb_common.h>
  22 #include <soc/usb/snps_usb_phy.h>
  23
  24 static struct usb_board_data usb0_board_data = {
  25         .parameter_override_x0 = 0xe6,
  26         .parameter_override_x1 = 0x8b,
  27         .parameter_override_x2 = 0x16,
  28         .parameter_override_x3 = 0x03,
  29 };
  30
  31 static void setup_usb(void)
  32 {
  33         /* Assert EN_PP3300_HUB for those board variants that use it. */
  34         gpio_output(USB_HUB_LDO_EN, 1);
  35
  36         setup_usb_host0(&usb0_board_data);
  37 }
  38
  39 static void configure_sdhci(void)
  40 {
  41         /* Program eMMC drive strength to 16/10/10 mA */
  42         write32p(SDC1_TLMM_CFG_ADDR, 0x9FE4);
  43         /* Program SD card drive strength to 16/10/10 mA */
  44         write32p(SDC2_TLMM_CFG_ADDR, 0x1FE4);
  45 }
  46
  47 static void qi2s_configure_gpios(void)
  48 {
  49         gpio_configure(GPIO_MI2S1_SCK, GPIO106_FUNC_MI2S1_SCK,
  50                 GPIO_NO_PULL, GPIO_16MA, GPIO_OUTPUT);
  51
  52         gpio_configure(GPIO_MI2S1_WS, GPIO108_FUNC_MI2S1_WS,
  53                 GPIO_NO_PULL, GPIO_16MA, GPIO_OUTPUT);
  54
  55         gpio_configure(GPIO_MI2S1_DATA0, GPIO107_FUNC_MI2S1_DATA0,
  56                 GPIO_NO_PULL, GPIO_16MA, GPIO_OUTPUT);
  57 }
  58
  59 static void edp_configure_gpios(void)
  60 {
  61         /* Panel power on GPIO enable */
  62         gpio_output(GPIO_PANEL_POWER_ON, 1);
  63
  64         /* Panel HPD GPIO enable */
  65         gpio_input_pulldown(GPIO_PANEL_HPD);
  66 }
  67
  68 static void display_startup(void)
  69 {
  70         struct edid ed;
  71
  72         if (!display_init_required()) {
  73                 printk(BIOS_INFO, "Skipping display init.\n");
  74                 return;
  75         }
  76
  77         enable_mdss_clk();
  78         edp_configure_gpios();
  79         mdelay(250); /* Delay for the panel to be up */
  80         if (edp_ctrl_init(&ed) == CB_SUCCESS) {
  81                 mdp_dsi_video_config(&ed);
  82                 mdp_dsi_video_on();
  83                 edid_set_framebuffer_bits_per_pixel(&ed, 32, 0);
  84                 fb_new_framebuffer_info_from_edid(&ed, (uintptr_t)0);
  85         }
  86 }
  87
  88 /*
  89  * Determine if board need to perform PCIe initialization.  Will return true if
  90  * NVMe initialization is needed, or false if it is an eMMC device.  On
  91  * Herobrine, if it is an NVMe enabled platform, logical sku_id & 2 will be
  92  * true.
  93  */
  94 bool mainboard_needs_pcie_init(void)
  95 {
  96         uint32_t sku = sku_id();
  97
  98         if (sku == CROS_SKU_UNKNOWN) {
  99                 printk(BIOS_WARNING, "Unknown SKU (%#x); assuming PCIe", sku);
 100                 return true;
 101         } else if (sku == CROS_SKU_UNPROVISIONED) {
 102                 printk(BIOS_WARNING, "Unprovisioned SKU (%#x); assuming PCIe", sku);
 103                 return true;
 104         }
 105
 106         return !!(sku & 0x2);
 107 }
 108
 109 static void mainboard_init(struct device *dev)
 110 {
 111         /* Configure clock for eMMC */
 112         clock_configure_sdcc1(384 * MHz);
 113         qc_emmc_early_init();
 114
 115         /* Configure clock for SD card */
 116         clock_configure_sdcc2(50 * MHz);
 117         configure_sdhci();
 118
 119         gpi_firmware_load(QUP_0_GSI_BASE);
 120         gpi_firmware_load(QUP_1_GSI_BASE);
 121
 122         /*
 123          * When coreboot firmware disables serial output,
 124          * we still need to load console UART QUP FW for OS.
 125          */
 126         if (!CONFIG(CONSOLE_SERIAL))
 127                 qupv3_se_fw_load_and_init(QUPV3_0_SE5, SE_PROTOCOL_UART, FIFO);
 128
 129         qupv3_se_fw_load_and_init(QUPV3_1_SE5, SE_PROTOCOL_I2C, MIXED);  /* Touch I2C */
 130         qupv3_se_fw_load_and_init(QUPV3_0_SE7, SE_PROTOCOL_UART, FIFO);  /* BT UART */
 131
 132         if (CONFIG(BOARD_GOOGLE_HEROBRINE_REV0)) {
 133                 /* Audio I2C */
 134                 qupv3_se_fw_load_and_init(QUPV3_0_SE0, SE_PROTOCOL_I2C, MIXED);
 135                 /* Trackpad I2C */
 136                 qupv3_se_fw_load_and_init(QUPV3_0_SE1, SE_PROTOCOL_I2C, MIXED);
 137                 /* SAR sensor I2C */
 138                 qupv3_se_fw_load_and_init(QUPV3_0_SE2, SE_PROTOCOL_I2C, MIXED);
 139                 /* Fingerprint SPI */
 140                 qupv3_se_fw_load_and_init(QUPV3_1_SE3, SE_PROTOCOL_SPI, MIXED);
 141         } else if (CONFIG(BOARD_GOOGLE_SENOR) || CONFIG(BOARD_GOOGLE_PIGLIN)) {
 142                 /* APPS I2C */
 143                 qupv3_se_fw_load_and_init(QUPV3_0_SE1, SE_PROTOCOL_I2C, GSI);
 144                 /* ESIM SPI */
 145                 qupv3_se_fw_load_and_init(QUPV3_1_SE4, SE_PROTOCOL_SPI, MIXED);
 146                 /* Trackpad I2C */
 147                 qupv3_se_fw_load_and_init(QUPV3_0_SE0, SE_PROTOCOL_I2C, MIXED);
 148         } else {
 149                 /* Trackpad I2C */
 150                 qupv3_se_fw_load_and_init(QUPV3_0_SE0, SE_PROTOCOL_I2C, MIXED);
 151                 /* SAR sensor I2C */
 152                 qupv3_se_fw_load_and_init(QUPV3_0_SE1, SE_PROTOCOL_I2C, MIXED);
 153                 /* Audio I2C */
 154                 qupv3_se_fw_load_and_init(QUPV3_0_SE2, SE_PROTOCOL_I2C, MIXED);
 155                 /* Fingerprint SPI */
 156                 if (CONFIG(HEROBRINE_HAS_FINGERPRINT))
 157                         qupv3_se_fw_load_and_init(QUPV3_1_SE1, SE_PROTOCOL_SPI, MIXED);
 158         }
 159
 160         /* Take FPMCU out of reset. Power was already applied
 161            in romstage and should have stabilized by now. */
 162         if (CONFIG(HEROBRINE_HAS_FINGERPRINT))
 163                 gpio_output(GPIO_FP_RST_L, 1);
 164
 165         setup_usb();
 166         qi2s_configure_gpios();
 167         display_startup();
 168 }
 169
 170 static void mainboard_enable(struct device *dev)
 171 {
 172         dev->ops->init = &mainboard_init;
 173 }
 174
 175 struct chip_operations mainboard_ops = {
 176         .enable_dev = mainboard_enable,
 177 };