mb/google/nissa/var/rull: add ssd timing and modify ssd GPIO pins of rtd3
[coreboot2.git] / src / mainboard / google / mistral / chromeos.fmd
blobccdfbde006bb8f8880de1c0e0eb7d536a87fc7a1
1 ## SPDX-License-Identifier: GPL-2.0-only
3 FLASH@0x0 8M {
4         WP_RO 4M {
5                 RO_SECTION 0x204000 {
6                         BOOTBLOCK 128K
7                         COREBOOT(CBFS)
8                         FMAP@0x200000 0x1000
9                         GBB 0x2f00
10                         RO_FRID 0x100
11                 }
12                 RO_VPD(PRESERVE) 128K
13                 RO_DDR_TRAINING(PRESERVE) 8K
14         }
16         RW_VPD(PRESERVE) 32K
17         RW_NVRAM(PRESERVE) 16K
18         RW_DDR_TRAINING(PRESERVE) 8K
19         RW_ELOG(PRESERVE) 4K
20         RW_SHARED 4K {
21                 SHARED_DATA
22         }
24         RW_SECTION_A 1280K {
25                 VBLOCK_A 8K
26                 FW_MAIN_A(CBFS)
27                 RW_FWID_A 256
28         }
31         RW_SECTION_B 1280K {
32                 VBLOCK_B 8K
33                 FW_MAIN_B(CBFS)
34                 RW_FWID_B 256
35         }
37         RW_LEGACY(CBFS)