mb/google/nissa/var/rull: add ssd timing and modify ssd GPIO pins of rtd3
[coreboot2.git] / src / mainboard / google / oak / boardid.c
blob55b6064620ad1ce79d27c2ecc5fb879b7745af87
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <boardid.h>
4 #include <gpio.h>
5 #include <console/console.h>
6 #include "gpio.h"
8 static int board_id_value = -1;
10 static uint8_t get_board_id(void)
12 uint8_t bid = 0;
13 static gpio_t pins[] = {[2] = BOARD_ID_2, [1] = BOARD_ID_1,
14 [0] = BOARD_ID_0};
16 bid = gpio_base2_value(pins, ARRAY_SIZE(pins));
18 printk(BIOS_INFO, "Board ID %d\n", bid);
20 return bid;
23 uint32_t board_id(void)
25 if (board_id_value < 0)
26 board_id_value = get_board_id();
28 return board_id_value;
31 uint32_t ram_code(void)
33 uint32_t code;
34 static gpio_t pins[] = {[3] = RAM_ID_3, [2] = RAM_ID_2, [1] = RAM_ID_1,
35 [0] = RAM_ID_0};
37 code = gpio_base2_value(pins, ARRAY_SIZE(pins));
39 printk(BIOS_INFO, "RAM Config: %u\n", code);
41 return code;