mb/google/nissa/var/rull: add ssd timing and modify ssd GPIO pins of rtd3
[coreboot2.git] / src / mainboard / google / oak / chromeos.c
blob739df2e25bc27894cfe7c16ddd6af7c3f057cd79
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <boardid.h>
4 #include <bootmode.h>
5 #include <boot/coreboot_tables.h>
6 #include <gpio.h>
8 #include "gpio.h"
10 void setup_chromeos_gpios(void)
12 gpio_input(WRITE_PROTECT);
13 gpio_input_pullup(EC_IN_RW);
14 gpio_input_pullup(EC_IRQ);
15 gpio_input(LID);
16 gpio_input_pullup(POWER_BUTTON);
17 if (board_id() + CONFIG_BOARD_ID_ADJUSTMENT < 5)
18 gpio_output(EC_SUSPEND_L, 1);
21 void fill_lb_gpios(struct lb_gpios *gpios)
23 struct lb_gpio chromeos_gpios[] = {
24 {LID.id, ACTIVE_HIGH, -1, "lid"},
25 {POWER_BUTTON.id, ACTIVE_HIGH, -1, "power"},
26 {EC_IN_RW.id, ACTIVE_HIGH, -1, "EC in RW"},
27 {EC_IRQ.id, ACTIVE_LOW, -1, "EC interrupt"},
28 {CR50_IRQ.id, ACTIVE_HIGH, -1, "TPM interrupt"},
30 lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios));
33 int get_write_protect_state(void)
35 return !gpio_get(WRITE_PROTECT);
38 int get_ec_is_trusted(void)
40 /* EC is trusted if not in RW. */
41 return !gpio_get(EC_IN_RW);