mb/google/nissa/var/rull: add ssd timing and modify ssd GPIO pins of rtd3
[coreboot2.git] / src / mainboard / google / rambi / variants / banjo / Makefile.mk
blob6711c2e76083bc45bdaf87d40d8fa6769e12e4df
1 ## SPDX-License-Identifier: GPL-2.0-only
3 # Order matters for SPD sources. The following indices
4 # define the SPD data to use.
5 # 0b000 - 2GiB total - 1 x 2GiB Samsung K4B4G1646Q-HYK0 1600MHz
6 # 0b001 - 4GiB total - 2 x 2GiB Hynix H5TC4G63AFR-PBA 1600MHz
7 # 0b010 - 2GiB total - 1 x 2GiB Hynix H5TC4G63AFR-PBA 1600MHz
8 # 0b011 - 4GiB total - 2 x 2GiB Samsung K4B4G1646Q-HYK0 1600MHz
9 # 0b100 - 2GiB total - 1 x 2GiB Hynix H5TC4G63CFR-PBA 1600MHz
10 # 0b101 - 4GiB total - 2 x 2GiB Hynix H5TC4G63CFR-PBA 1600MHz
11 SPD_SOURCES = samsung_2GiB_dimm_K4B4G1646Q-HYK0
12 SPD_SOURCES += hynix_2GiB_dimm_H5TC4G63AFR-PBA
13 SPD_SOURCES += hynix_2GiB_dimm_H5TC4G63AFR-PBA
14 SPD_SOURCES += samsung_2GiB_dimm_K4B4G1646Q-HYK0
15 SPD_SOURCES += Hynix_HMT425S6CFR6A_H5TC4G63CFR
16 SPD_SOURCES += Hynix_HMT425S6CFR6A_H5TC4G63CFR