mb/google/nissa/var/rull: add ssd timing and modify ssd GPIO pins of rtd3

[coreboot2.git] / src / mainboard / google / rambi / variants / enguarde / overridetree.cb

chip soc/intel/baytrail

        # Allow PCIe devices to wake system from suspend
        register "pcie_wake_enable" = "1"

        device domain 0 on
                device pci 1c.1 on  end # PCIE_PORT2
        end
end