mb/google/nissa/var/rull: add ssd timing and modify ssd GPIO pins of rtd3
[coreboot2.git] / src / mainboard / google / zork / dsdt.asl
blob4cb85069b7e21a881741529aabced7cda52c09b0
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 #include <variant/ec.h>
5 /* DefinitionBlock Statement */
6 #include <acpi/acpi.h>
8 DefinitionBlock (
9         "dsdt.aml",
10         "DSDT",
11         ACPI_DSDT_REV_2,
12         OEM_ID,
13         ACPI_TABLE_CREATOR,
14         0x00010001      /* OEM Revision */
15         )
16 {       /* Start of ASL file */
17         #include <acpi/dsdt_top.asl>
19         Name(LIDS, 0)
21         #include <soc.asl>
23         /* Thermal handler */
24         #include <variant/acpi/thermal.asl>
26         /* ChromeOS Embedded Controller */
27         Scope (\_SB.PCI0.LPCB)
28         {
29                 /* ACPI code for EC SuperIO functions */
30                 #include <ec/google/chromeec/acpi/superio.asl>
31                 /* ACPI code for EC functions */
32                 #include <ec/google/chromeec/acpi/ec.asl>
33         }
35 /* End of ASL file */