mb/google/nissa/var/rull: add ssd timing and modify ssd GPIO pins of rtd3
[coreboot2.git] / src / mainboard / google / zork / ec.c
blobf4f441c7a180059815d2503ad125eeab92de18c9
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 #include <acpi/acpi.h>
4 #include <console/console.h>
5 #include <ec/google/chromeec/ec.h>
6 #include <variant/ec.h>
8 void mainboard_ec_init(void)
10 const struct google_chromeec_event_info info = {
11 .log_events = MAINBOARD_EC_LOG_EVENTS,
12 .sci_events = MAINBOARD_EC_SCI_EVENTS,
13 .s3_wake_events = MAINBOARD_EC_S3_WAKE_EVENTS,
14 .s3_device_events = MAINBOARD_EC_S3_DEVICE_EVENTS,
15 .s5_wake_events = MAINBOARD_EC_S5_WAKE_EVENTS,
18 printk(BIOS_DEBUG, "mainboard: EC init\n");
20 google_chromeec_events_init(&info, acpi_is_wakeup_s3());