src/mainboard/google/zork/variants/ezkinil/gpio.c

   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2
   3 #include <baseboard/gpio.h>
   4 #include <baseboard/variants.h>
   5 #include <gpio.h>
   6 #include <ec/google/chromeec/ec.h>
   7
   8 static const struct soc_amd_gpio ezkinil_bid1_gpio_set_stage_ram[] = {
   9         /* PEN_DETECT_ODL - Not connected */
  10         PAD_NC(GPIO_4),
  11         /* PEN_POWER_EN - Not connected */
  12         PAD_NC(GPIO_5),
  13         /* DMIC_SEL */
  14         PAD_GPO(GPIO_13, LOW), // Select Camera 1 Dmic
  15         /* USB_OC4_L - USB_A1 */
  16         PAD_NF(GPIO_14, USB_OC4_L, PULL_NONE),
  17         /* USB_OC2_L - USB A0 */
  18         PAD_NF(GPIO_18, USB_OC2_L, PULL_NONE),
  19         /* EN_PWR_WIFI */
  20         PAD_GPO(GPIO_29, HIGH),
  21         /* EN_PWR_TOUCHPAD_PS2 */
  22         PAD_GPO(GPIO_67, HIGH),
  23         /* MST_GPIO_2 (Fw Update HDMI hub) */
  24         PAD_GPI(GPIO_86, PULL_NONE),
  25         /* EN_DEV_BEEP_L */
  26         PAD_GPO(GPIO_89, HIGH),
  27         /* MST_GPIO_3 (Fw Update HDMI hub) */
  28         PAD_GPI(GPIO_90, PULL_NONE),
  29         /* USI_RESET */
  30         PAD_GPO(GPIO_140, HIGH),
  31 };
  32
  33 static const struct soc_amd_gpio ezkinil_bid2_gpio_set_stage_ram[] = {
  34         /* PEN_DETECT_ODL - Not connected */
  35         PAD_NC(GPIO_4),
  36         /* PEN_POWER_EN - Not connected */
  37         PAD_NC(GPIO_5),
  38         /* DMIC_SEL */
  39         PAD_GPO(GPIO_13, LOW), // Select Camera 1 Dmic
  40         /* EN_PWR_WIFI */
  41         PAD_GPO(GPIO_29, HIGH),
  42         /* EN_PWR_TOUCHPAD_PS2 */
  43         PAD_GPO(GPIO_67, HIGH),
  44         /* FPMCU_BOOT0 Change NC */
  45         PAD_NC(GPIO_69),
  46         /* MST_GPIO_2 (Fw Update HDMI hub) Change NC */
  47         PAD_NC(GPIO_86),
  48         /* EN_DEV_BEEP_L */
  49         PAD_GPO(GPIO_89, HIGH),
  50         /* TP */
  51         PAD_NC(GPIO_90),
  52         /* USI_RESET */
  53         PAD_GPO(GPIO_140, HIGH),
  54 };
  55
  56 static const struct soc_amd_gpio ezkinil_bid3_gpio_set_stage_ram[] = {
  57         /* PEN_DETECT_ODL - Not connected */
  58         PAD_NC(GPIO_4),
  59         /* PEN_POWER_EN - Not connected */
  60         PAD_NC(GPIO_5),
  61         /* FPMCU_BOOT0 Change NC */
  62         PAD_NC(GPIO_69),
  63         /* EN_DEV_BEEP_L */
  64         PAD_GPO(GPIO_89, HIGH),
  65         /* USI_RESET */
  66         PAD_GPO(GPIO_140, HIGH),
  67 };
  68
  69 const struct soc_amd_gpio *variant_override_gpio_table(size_t *size)
  70 {
  71         uint32_t board_version;
  72
  73         /*
  74          * If board version cannot be read, assume that this is an older revision of the board
  75          * and so apply overrides. If board version is provided by the EC, then apply overrides
  76          * if version < 2.
  77          */
  78         if (google_chromeec_cbi_get_board_version(&board_version) != 0)
  79                 board_version = 1;
  80
  81         if (board_version <= 1) {
  82                 *size = ARRAY_SIZE(ezkinil_bid1_gpio_set_stage_ram);
  83                 return ezkinil_bid1_gpio_set_stage_ram;
  84         } else if (board_version == 2) {
  85                 *size = ARRAY_SIZE(ezkinil_bid2_gpio_set_stage_ram);
  86                 return ezkinil_bid2_gpio_set_stage_ram;
  87         }
  88
  89         *size = ARRAY_SIZE(ezkinil_bid3_gpio_set_stage_ram);
  90         return ezkinil_bid3_gpio_set_stage_ram;
  91 }