mb/google/nissa/var/rull: add ssd timing and modify ssd GPIO pins of rtd3
[coreboot2.git] / src / mainboard / google / zork / variants / trembyle / gpio.c
blobfda4f5afa579b2963aff5dd2108d3e06c2724a9c
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 #include <baseboard/gpio.h>
4 #include <baseboard/variants.h>
5 #include <gpio.h>
6 #include <ec/google/chromeec/ec.h>
8 static const struct soc_amd_gpio trembyle_bid1_bid2_gpio_set_stage_ram[] = {
9 /* DMIC_SEL */
10 PAD_GPO(GPIO_13, LOW), // Select Camera 1 Dmic
11 /* USB_OC4_L - USB_A1 */
12 PAD_NF(GPIO_14, USB_OC4_L, PULL_NONE),
13 /* USB_OC2_L - USB A0 */
14 PAD_NF(GPIO_18, USB_OC2_L, PULL_NONE),
15 /* EN_PWR_WIFI */
16 PAD_GPO(GPIO_29, HIGH),
17 /* EN_PWR_TOUCHPAD_PS2 */
18 PAD_GPO(GPIO_67, HIGH),
19 /* DMIC_AD_EN */
20 PAD_GPO(GPIO_84, HIGH),
21 /* MST_GPIO_2 (Fw Update HDMI hub) */
22 PAD_GPI(GPIO_86, PULL_NONE),
23 /* EN_DEV_BEEP_L */
24 PAD_GPO(GPIO_89, HIGH),
25 /* MST_GPIO_3 (Fw Update HDMI hub) */
26 PAD_GPI(GPIO_90, PULL_NONE),
27 /* USI_RESET */
28 PAD_GPO(GPIO_140, HIGH),
31 static const struct soc_amd_gpio trembyle_bid3_gpio_set_stage_ram[] = {
32 /* DMIC_SEL */
33 PAD_GPO(GPIO_13, LOW), // Select Camera 1 Dmic
34 /* USB_OC4_L - USB_A1 */
35 PAD_NF(GPIO_14, USB_OC4_L, PULL_NONE),
36 /* USB_OC2_L - USB A0 */
37 PAD_NF(GPIO_18, USB_OC2_L, PULL_NONE),
38 /* EN_PWR_WIFI */
39 PAD_GPO(GPIO_29, HIGH),
40 /* EN_PWR_TOUCHPAD_PS2 */
41 PAD_GPO(GPIO_67, HIGH),
42 /* MST_GPIO_2 (Fw Update HDMI hub) */
43 PAD_GPI(GPIO_86, PULL_NONE),
44 /* EN_DEV_BEEP_L */
45 PAD_GPO(GPIO_89, HIGH),
46 /* MST_GPIO_3 (Fw Update HDMI hub) */
47 PAD_GPI(GPIO_90, PULL_NONE),
48 /* USI_RESET */
49 PAD_GPO(GPIO_140, HIGH),
52 const struct soc_amd_gpio *variant_override_gpio_table(size_t *size)
54 uint32_t board_version;
57 * If board version cannot be read, assume that this is an older revision of the board
58 * and so apply overrides. If board version is provided by the EC, then apply overrides
59 * if version < 2.
61 if (google_chromeec_cbi_get_board_version(&board_version) != 0)
62 board_version = 1;
64 if (board_version <= 2) {
65 *size = ARRAY_SIZE(trembyle_bid1_bid2_gpio_set_stage_ram);
66 return trembyle_bid1_bid2_gpio_set_stage_ram;
67 } else if (board_version <= 3) {
68 *size = ARRAY_SIZE(trembyle_bid3_gpio_set_stage_ram);
69 return trembyle_bid3_gpio_set_stage_ram;
72 *size = 0;
73 return NULL;