mb/google/nissa/var/rull: add ssd timing and modify ssd GPIO pins of rtd3
[coreboot2.git] / src / mainboard / hp / 280_g2 / hda_verb.c
blob908fe0ad1c550e8c5a72f93a167006ee78c17bd4
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <device/azalia_device.h>
5 const u32 cim_verb_data[] = {
6 /* coreboot specific header */
7 0x10ec0221, /* Codec Vendor / Device ID: Realtek ALC221 */
8 0x103c2b5e, /* Subsystem ID */
9 11, /* Number of jacks */
10 AZALIA_SUBVENDOR(0, 0x103c2b5e),
11 AZALIA_PIN_CFG(0, 0x12, 0x40000000),
12 AZALIA_PIN_CFG(0, 0x14, 0x01014010),
13 AZALIA_PIN_CFG(0, 0x17, 0x90170120),
14 AZALIA_PIN_CFG(0, 0x18, AZALIA_PIN_CFG_NC(0)),
15 AZALIA_PIN_CFG(0, 0x19, AZALIA_PIN_CFG_NC(0)),
16 AZALIA_PIN_CFG(0, 0x1a, 0x01813030),
17 AZALIA_PIN_CFG(0, 0x1b, AZALIA_PIN_CFG_NC(0)),
18 AZALIA_PIN_CFG(0, 0x1d, 0x4044c301),
19 AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
20 AZALIA_PIN_CFG(0, 0x21, 0x0221101f),
23 const u32 pc_beep_verbs[] = {};
25 AZALIA_ARRAY_SIZES;