mb/google/nissa/var/rull: add ssd timing and modify ssd GPIO pins of rtd3
[coreboot2.git] / src / mainboard / pcengines / apu2 / Makefile.mk
blob93df43d17dd84c6c523533338715c28401bc6f7f
1 # SPDX-License-Identifier: GPL-2.0-only
3 bootblock-y += bootblock.c
5 romstage-y += BiosCallOuts.c
6 romstage-y += OemCustomize.c
7 romstage-y += gpio_ftns.c
9 ramstage-y += BiosCallOuts.c
10 ramstage-y += OemCustomize.c
11 ramstage-y += gpio_ftns.c
13 # Order of names in SPD_SOURCES is important!
14 SPD_SOURCES = HYNIX-2G-1333
15 SPD_SOURCES += HYNIX-4G-1333-ECC
17 subdirs-y += variants/$(VARIANT_DIR)