mb/google/nissa/var/rull: add ssd timing and modify ssd GPIO pins of rtd3
[coreboot2.git] / src / mainboard / portwell / m107 / w25q64.c
blob3d2ce03883d8c45c63782bbdcd676e4bfdb6b061
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <soc/spi.h>
4 #include <string.h>
6 /*
7 * SPI VSCC configuration
8 */
9 #define SPI_VSCC (WG_64_BYTE | EO(0x20) | BES_4_KB)
11 static const struct vscc_config spi_config = {
12 .lvscc = SPI_VSCC,
13 .uvscc = SPI_VSCC,
16 int mainboard_get_spi_vscc_config(struct vscc_config *cfg)
18 memcpy(cfg, &spi_config, sizeof(*cfg));
20 return 0;