mb/google/nissa/var/rull: add ssd timing and modify ssd GPIO pins of rtd3
[coreboot2.git] / src / mainboard / protectli / vault_adl_p / dsdt.asl
bloba6e97c4ceb9a41f72d22294068be601b02396e55
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <acpi/acpi.h>
5 DefinitionBlock(
6         "dsdt.aml",
7         "DSDT",
8         ACPI_DSDT_REV_2,
9         OEM_ID,
10         ACPI_TABLE_CREATOR,
11         0x20110725
14         #include <acpi/dsdt_top.asl>
15         #include <soc/intel/common/block/acpi/acpi/platform.asl>
16         #include <soc/intel/common/block/acpi/acpi/globalnvs.asl>
17         #include <cpu/intel/common/acpi/cpu.asl>
19         Device (\_SB.PCI0) {
20                 #include <soc/intel/common/block/acpi/acpi/northbridge.asl>
21                 #include <soc/intel/alderlake/acpi/southbridge.asl>
22                 #include <soc/intel/alderlake/acpi/tcss.asl>
23         }
25         Scope (\_SB.PCI0.LPCB)
26         {
27                 #include "acpi/superio.asl"
28         }
30         #include <southbridge/intel/common/acpi/sleepstates.asl>