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mb/google/nissa/var/rull: add ssd timing and modify ssd GPIO pins of rtd3
[coreboot2.git]
/
src
/
mainboard
/
siemens
/
mc_apl1
/
board_info.txt
blob
aa2610568806880e88c2744e565a9652a134fa8e
1
Vendor name: Siemens
2
Board name: MC APL1
3
Category: misc
4
ROM protocol: SPI
5
ROM socketed: no
6
Flashrom support: yes