mb/google/nissa/var/rull: add ssd timing and modify ssd GPIO pins of rtd3
[coreboot2.git] / src / mainboard / supermicro / x10slm-f / devicetree.cb
blob479de3f815bcdb4d8c7cf176592c61c499721d11
1 ## SPDX-License-Identifier: GPL-2.0-or-later
3 chip northbridge/intel/haswell
4 register "spd_addresses" = "{0x50, 0x51, 0x52, 0x53}"
6 chip cpu/intel/haswell
7 device cpu_cluster 0 on ops haswell_cpu_bus_ops end
8 end
10 device domain 0 on
11 ops haswell_pci_domain_ops
12 subsystemid 0x15d9 0x0803 inherit
14 device pci 00.0 on end # Host bridge
15 device pci 01.0 on end # PEG 10
16 device pci 01.1 on end # PEG 11
17 device pci 02.0 off end # IGD
18 device pci 03.0 off end # Mini-HD audio
20 chip southbridge/intel/lynxpoint
21 register "sata_port_map" = "0x3f"
23 register "gen1_dec" = "0x00000295" # Super I/O HWM
25 device pci 14.0 on end # xHCI controller
26 device pci 16.0 on end # Management Engine interface 1
27 device pci 16.1 on end # Management Engine interface 2
28 device pci 16.2 off end # Management Engine IDE-R
29 device pci 16.3 off end # Management Engine KT
30 device pci 19.0 off end # Intel Gigabit Ethernet
31 device pci 1a.0 on end # EHCI controller 2
32 device pci 1b.0 off end # HD audio controller
33 device pci 1c.0 on # PCIe root port 1
34 device pci 00.0 on # ASPEED PCI-to-PCI bridge
35 device pci 00.0 on end # VGA controller
36 end
37 end
38 device pci 1c.1 off end # PCIe root port 2
39 device pci 1c.2 on # PCIe root port 3
40 device pci 00.0 on # Intel I210 Gigabit Ethernet
41 subsystemid 0x15d9 0x1533
42 end
43 end
44 device pci 1c.3 on # PCIe root port 4
45 device pci 00.0 on # Intel I210 Gigabit Ethernet
46 subsystemid 0x15d9 0x1533
47 end
48 end
49 device pci 1c.4 on end # PCIe root port 5
50 device pci 1c.5 off end # PCIe root port 6
51 device pci 1c.6 off end # PCIe root port 7
52 device pci 1c.7 off end # PCIe root port 8
53 device pci 1d.0 on end # EHCI controller 1
54 device pci 1f.0 on # LPC bridge
55 chip superio/nuvoton/nct6776
56 device pnp 2e.0 off end # Floppy
57 device pnp 2e.1 off end # Parallel
58 device pnp 2e.2 on # UART A
59 io 0x60 = 0x03f8
60 irq 0x70 = 4
61 end
62 device pnp 2e.3 on # UART B
63 io 0x60 = 0x02f8
64 irq 0x70 = 3
65 end
66 device pnp 2e.5 off end # PS/2 KBC
67 device pnp 2e.6 off end # CIR
68 device pnp 2e.7 off end # GPIO8
69 device pnp 2e.107 off end # GPIO9
70 device pnp 2e.8 off end # WDT
71 device pnp 2e.108 off end # GPIO0
72 device pnp 2e.208 off end # GPIOA
73 device pnp 2e.308 off end # GPIO base
74 device pnp 2e.109 off end # GPIO1
75 device pnp 2e.209 off end # GPIO2
76 device pnp 2e.309 off end # GPIO3
77 device pnp 2e.409 off end # GPIO4
78 device pnp 2e.509 off end # GPIO5
79 device pnp 2e.609 off end # GPIO6
80 device pnp 2e.709 off end # GPIO7
81 device pnp 2e.a off end # ACPI
82 device pnp 2e.b on # HWM, LED
83 io 0x60 = 0x0290
84 io 0x62 = 0
85 irq 0x70 = 0
86 end
87 device pnp 2e.d off end # VID
88 device pnp 2e.e off end # CIR wake-up
89 device pnp 2e.f off end # GPIO PP/OD
90 device pnp 2e.14 off end # SVID
91 device pnp 2e.16 off end # Deep sleep
92 device pnp 2e.17 off end # GPIOA
93 end
94 end
95 device pci 1f.2 on end # SATA controller 1
96 device pci 1f.3 on end # SMBus
97 device pci 1f.5 off end # SATA controller 2
98 device pci 1f.6 on end # PCH thermal sensor
99 end