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mb/google/nissa/var/rull: add ssd timing and modify ssd GPIO pins of rtd3
[coreboot2.git]
/
src
/
mainboard
/
system76
/
addw1
/
cmos.layout
blob
b3df3808ccb79e960318daa472facf3f9226d1eb
1
# SPDX-License-Identifier: GPL-2.0-only
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entries
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0 384 r 0 reserved_memory
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# RTC_BOOT_BYTE (coreboot hardcoded)
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384 1 e 4 boot_option
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388 4 h 0 reboot_counter
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# RTC_CLK_ALTCENTURY
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400 8 r 0 century
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412 4 e 6 debug_level
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416 1 e 2 me_state
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417 3 h 0 me_state_counter
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# CMOS_VSTART_ramtop
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800 80 r 0 ramtop
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984 16 h 0 check_sum
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enumerations
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2 0 Enable
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2 1 Disable
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4 0 Fallback
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4 1 Normal
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6 0 Emergency
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6 1 Alert
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6 2 Critical
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6 3 Error
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6 4 Warning
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6 5 Notice
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6 6 Info
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6 7 Debug
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6 8 Spew
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checksums
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checksum 408 799 984