mb/google/nissa/var/rull: add ssd timing and modify ssd GPIO pins of rtd3

[coreboot2.git] / src / northbridge / intel / sandybridge / memmap.h

/* SPDX-License-Identifier: GPL-2.0-only */

#ifndef __NORTHBRIDGE_INTEL_SANDYBRIDGE_MEMMAP_H__
#define __NORTHBRIDGE_INTEL_SANDYBRIDGE_MEMMAP_H__

#define GFXVT_BASE              0xfed90000ULL
#define VTVC0_BASE              0xfed91000ULL

#endif /* __NORTHBRIDGE_INTEL_SANDYBRIDGE_MEMMAP_H__ */