src/northbridge/intel/sandybridge/raminit.h

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #ifndef RAMINIT_H
   4 #define RAMINIT_H
   5
   6 #include "pei_data.h"
   7
   8 #define BOOT_PATH_NORMAL        0
   9 #define BOOT_PATH_RESET         1
  10 #define BOOT_PATH_RESUME        2
  11
  12 void mainboard_fill_pei_data(struct pei_data *pei_data);
  13
  14 /*
  15  * SPD information API adopted from nb/intel/haswell.
  16  *
  17  * This applies to both MRC and native raminit, only for boards with
  18  * CONFIG(HAVE_SPD_IN_CBFS).
  19  *
  20  * spd_info.addresses is an array of 4 bytes representing the SMBus addresses
  21  * of the SPD EEPROM of (respectively) Channel 0 Slot 0, C0S1, C1S0, C1S1.
  22  * Boards with onboard memory for the slot without actual SPD EEPROM enter
  23  * SPD_MEMORY_DOWN in that position and enter in spd_info.spd_index a 0-based index into
  24  * spd.bin file in CBFS, which is a concatenation of 256-byte SPD data blobs.
  25  *
  26  * Only one set of SPD data is supported.
  27  */
  28
  29 #define SPD_MEMORY_DOWN 0xFF
  30
  31 struct spd_info {
  32         uint8_t addresses[4];
  33         unsigned int spd_index;
  34 };
  35
  36 /*
  37  * Mainboard callback to fill in the SPD addresses.
  38  *
  39  * @param spdi Pointer to spd_info struct to be populated by mainboard.
  40  */
  41 void mb_get_spd_map(struct spd_info *spdi);
  42
  43 #endif /* RAMINIT_H */