1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <device/device.h>
4 #include <device/pci.h>
5 #include <device/pci_ops.h>
6 #include <device/pci_ids.h>
9 static void pci_init(struct device
*dev
)
13 /* Enable Bus Master */
14 pci_or_config16(dev
, PCI_COMMAND
, PCI_COMMAND_MASTER
);
16 /* This device has no interrupt */
17 pci_write_config8(dev
, INTR
, 0xff);
19 /* Disable parity error response and SERR */
20 pci_and_config16(dev
, PCI_BRIDGE_CONTROL
,
21 ~(PCI_BRIDGE_CTL_PARITY
| PCI_BRIDGE_CTL_SERR
));
23 /* Master Latency Count must be set to 0x04! */
24 pci_update_config8(dev
, SMLT
, 0x07, 0x04 << 3);
26 /* Clear errors in status registers. FIXME: Do something? */
27 reg16
= pci_read_config16(dev
, PSTS
);
29 pci_write_config16(dev
, PSTS
, reg16
);
31 reg16
= pci_read_config16(dev
, SECSTS
);
33 pci_write_config16(dev
, SECSTS
, reg16
);
36 static struct device_operations device_ops
= {
37 .read_resources
= pci_bus_read_resources
,
38 .set_resources
= pci_dev_set_resources
,
39 .enable_resources
= pci_bus_enable_resources
,
41 .scan_bus
= pci_scan_bridge
,
42 .ops_pci
= &pci_dev_ops_pci
,
46 /* 82801BA/CA/DB/EB/ER/FB/FR/FW/FRW/GB/GR/GDH/HB/IB/6300ESB/i3100 */
47 static const struct pci_driver i82801g_pci __pci_driver
= {
49 .vendor
= PCI_VID_INTEL
,
53 /* Mobile / Ultra Mobile */
54 /* 82801BAM/CAM/DBL/DBM/FBM/GBM/GHM/GU/HBM/HEM */
55 static const struct pci_driver i82801gmu_pci __pci_driver
= {
57 .vendor
= PCI_VID_INTEL
,