src/mainboard/starlabs/starbook/variants/tgl/devtree.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <chip.h>
   4 #include <cpu/intel/turbo.h>
   5 #include <device/device.h>
   6 #include <device/pci_def.h>
   7 #include <option.h>
   8 #include <types.h>
   9 #include <variants.h>
  10
  11 void devtree_update(void)
  12 {
  13         config_t *cfg = config_of_soc();
  14
  15         struct soc_power_limits_config *soc_conf_2core =
  16                 &cfg->power_limits_config[POWER_LIMITS_U_2_CORE];
  17
  18         struct soc_power_limits_config *soc_conf_4core =
  19                 &cfg->power_limits_config[POWER_LIMITS_U_4_CORE];
  20
  21         struct device *nic_dev = pcidev_on_root(0x14, 3);
  22         struct device *tbt_pci_dev = pcidev_on_root(0x07, 0);
  23         struct device *tbt_dma_dev = pcidev_on_root(0x0d, 2);
  24
  25
  26         /* Update PL1 & PL2 based on CMOS settings */
  27         switch (get_power_profile(PP_POWER_SAVER)) {
  28         case PP_POWER_SAVER:
  29                 disable_turbo();
  30                 soc_conf_2core->tdp_pl1_override        = 15;
  31                 soc_conf_4core->tdp_pl1_override        = 15;
  32                 soc_conf_2core->tdp_pl2_override        = 15;
  33                 soc_conf_4core->tdp_pl2_override        = 15;
  34                 cfg->tcc_offset                         = 30;
  35                 break;
  36         case PP_BALANCED:
  37                 soc_conf_2core->tdp_pl1_override        = 15;
  38                 soc_conf_4core->tdp_pl1_override        = 15;
  39                 soc_conf_2core->tdp_pl2_override        = 25;
  40                 soc_conf_4core->tdp_pl2_override        = 25;
  41                 cfg->tcc_offset                         = 25;
  42                 break;
  43         case PP_PERFORMANCE:
  44                 soc_conf_2core->tdp_pl1_override        = 28;
  45                 soc_conf_4core->tdp_pl1_override        = 28;
  46                 soc_conf_2core->tdp_pl2_override        = 40;
  47                 soc_conf_4core->tdp_pl2_override        = 40;
  48                 cfg->tcc_offset                         = 20;
  49                 break;
  50         }
  51
  52         /* Enable/Disable Wireless based on CMOS settings */
  53         if (get_uint_option("wireless", 1) == 0)
  54                 nic_dev->enabled = 0;
  55
  56         /* Enable/Disable Webcam based on CMOS settings */
  57         cfg->usb2_ports[CONFIG_CCD_PORT].enable = get_uint_option("webcam", 1);
  58
  59         /* Enable/Disable Thunderbolt based on CMOS settings */
  60         if (get_uint_option("thunderbolt", 1) == 0) {
  61                 cfg->UsbTcPortEn = 0;
  62                 cfg->TcssXhciEn = 0;
  63                 tbt_pci_dev->enabled = 0;
  64                 tbt_dma_dev->enabled = 0;
  65         }
  66 }