payloads/libpayload/arch/x86/delay.c

   1 /*
   2  *
   3  * Copyright (C) 2018 Google LLC
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions
   7  * are met:
   8  * 1. Redistributions of source code must retain the above copyright
   9  *    notice, this list of conditions and the following disclaimer.
  10  * 2. Redistributions in binary form must reproduce the above copyright
  11  *    notice, this list of conditions and the following disclaimer in the
  12  *    documentation and/or other materials provided with the distribution.
  13  * 3. The name of the author may not be used to endorse or promote products
  14  *    derived from this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  26  * SUCH DAMAGE.
  27  */
  28
  29 #include <libpayload.h>
  30 #include <arch/apic.h>
  31
  32 /* The pause instruction can delay 10-140 CPU cycles, so avoid calling it when
  33  * getting close to finishing. Depending on the timer source, the timer can be
  34  * running at CPU frequency, bus frequency, or some arbitrary value. We assume
  35  * that the timer is running at the CPU frequency. */
  36 #define PAUSE_THRESHOLD_TICKS           150
  37
  38 /* Let's assume APIC interrupts take at least 100us */
  39 #define APIC_INTERRUPT_LATENCY_NS       (100 * NSECS_PER_USEC)
  40
  41 void arch_ndelay(uint64_t ns)
  42 {
  43         uint64_t delta = ns * timer_hz() / NSECS_PER_SEC;
  44         uint64_t pause_delta = 0;
  45         uint64_t apic_us = 0;
  46         uint64_t start = timer_raw_value();
  47
  48         if (ns > APIC_INTERRUPT_LATENCY_NS)
  49                 apic_us = (ns - APIC_INTERRUPT_LATENCY_NS) / NSECS_PER_USEC;
  50
  51         if (CONFIG(LP_ENABLE_APIC) && apic_initialized() && apic_us)
  52                 apic_delay(apic_us);
  53
  54         if (delta > PAUSE_THRESHOLD_TICKS)
  55                 pause_delta = delta - PAUSE_THRESHOLD_TICKS;
  56
  57         while (timer_raw_value() - start < pause_delta)
  58                 asm volatile("pause\n\t");
  59
  60         while (timer_raw_value() - start < delta)
  61                 continue;
  62 }