src/northbridge/amd/agesa/agesa_helper.h

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #ifndef _AGESA_HELPER_H_
   4 #define _AGESA_HELPER_H_
   5
   6 #include <arch/romstage.h>
   7
   8 enum {
   9         PICK_DMI,       /* DMI Interface */
  10         PICK_PSTATE,    /* Acpi Pstate SSDT Table */
  11         PICK_SRAT,      /* SRAT Table */
  12         PICK_SLIT,      /* SLIT Table */
  13         PICK_WHEA_MCE,  /* WHEA MCE table */
  14         PICK_WHEA_CMC,  /* WHEA CMV table */
  15         PICK_ALIB,      /* SACPI SSDT table with ALIB implementation */
  16         PICK_IVRS,      /* IOMMU ACPI IVRS(I/O Virtualization Reporting Structure) table */
  17         PICK_CRAT,      /* Component Resource Affinity Table table */
  18         PICK_CDIT,      /* Component Locality Distance Information table */
  19 };
  20
  21 void agesawrapper_setlateinitptr(void *Late);
  22 void *agesawrapper_getlateinitptr(int pick);
  23
  24 void amd_initcpuio(void);
  25 void amd_initenv(void);
  26
  27 void *GetHeapBase(void);
  28 void EmptyHeap(void);
  29
  30 #define BSP_STACK_BASE_ADDR             0x30000
  31
  32 /* This covers node 0 only. */
  33 #define HIGH_ROMSTAGE_STACK_SIZE        (0x48000 - BSP_STACK_BASE_ADDR)
  34
  35 #define HIGH_MEMORY_SCRATCH             0x30000
  36
  37 void fixup_cbmem_to_UC(int s3resume);
  38
  39 void restore_mtrr(void);
  40 void backup_mtrr(void);
  41 const void *OemS3Saved_MTRR_Storage(void);
  42
  43 #endif /* _AGESA_HELPER_H_ */