src/soc/mediatek/common/timer.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <device/mmio.h>
   4 #include <timer.h>
   5 #include <delay.h>
   6 #include <thread.h>
   7
   8 #include <soc/addressmap.h>
   9 #include <soc/timer.h>
  10
  11 static struct mtk_gpt_regs *const mtk_gpt = (void *)GPT_BASE;
  12
  13 __weak void timer_prepare(void) { /* do nothing */ }
  14
  15 static uint64_t timer_raw_value(void)
  16 {
  17         /*
  18          * According to "General-Purpose Timer (GPT).pdf", The read operation of
  19          * gpt6_cnt_l will make gpt6_cnt_h fixed until the next read operation
  20          * of gpt6_cnt_l. Therefore, we must read gpt6_cnt_l before gpt6_cnt_h.
  21          */
  22         uint32_t low = read32(&mtk_gpt->gpt6_cnt_l);
  23         uint32_t high = read32(&mtk_gpt->gpt6_cnt_h);
  24
  25         return low | (uint64_t)high << 32;
  26 }
  27
  28 void timer_monotonic_get(struct mono_time *mt)
  29 {
  30         mono_time_set_usecs(mt, timer_raw_value() / GPT_MHZ);
  31 }
  32
  33 void init_timer(void)
  34 {
  35         timer_prepare();
  36
  37         /* Disable timer and clear the counter */
  38         clrbits32(&mtk_gpt->gpt6_con, GPT6_CON_EN);
  39         setbits32(&mtk_gpt->gpt6_con, GPT6_CON_CLR);
  40
  41         /* Set clock source to system clock and set clock divider to 1 */
  42         SET32_BITFIELDS(&GPT6_CLOCK_REG(mtk_gpt),
  43                         GPT6_CLK_CLK6, GPT6_CLK_CLK6_SYS,
  44                         GPT6_CLK_CLKDIV6, GPT6_CLK_CLKDIV_DIV1);
  45         /* Set operation mode to FREERUN mode and enable timer */
  46         SET32_BITFIELDS(&mtk_gpt->gpt6_con,
  47                         GPT6_CON_MODE6, GPT6_MODE_FREERUN,
  48                         GPT6_CON_EN6, GPT6_CON_EN);
  49 }