src/soc/mediatek/mt8195/i2c.c

   1 /* SPDX-License-Identifier: GPL-2.0-only OR MIT */
   2
   3 #include <assert.h>
   4 #include <console/console.h>
   5 #include <device/mmio.h>
   6 #include <device/i2c_simple.h>
   7 #include <gpio.h>
   8 #include <soc/i2c.h>
   9
  10 struct mtk_i2c mtk_i2c_bus_controller[] = {
  11         [0] = {
  12                 .i2c_regs = (void *)(I2C_BASE),
  13                 .i2c_dma_regs = (void *)(I2C_DMA_BASE),
  14                 .mt_i2c_flag = I2C_APDMA_ASYNC,
  15         },
  16         [1] = {
  17                 .i2c_regs = (void *)(I2C_BASE + 0x1000),
  18                 .i2c_dma_regs = (void *)(I2C_DMA_BASE + 0x180),
  19                 .mt_i2c_flag = I2C_APDMA_ASYNC,
  20         },
  21         [2] = {
  22                 .i2c_regs = (void *)(I2C_BASE + 0x2000),
  23                 .i2c_dma_regs = (void *)(I2C_DMA_BASE + 0x300),
  24                 .mt_i2c_flag = I2C_APDMA_ASYNC,
  25         },
  26         [3] = {
  27                 .i2c_regs = (void *)(I2C_BASE + 0x3000),
  28                 .i2c_dma_regs = (void *)(I2C_DMA_BASE + 0x400),
  29                 .mt_i2c_flag = I2C_APDMA_ASYNC,
  30         },
  31         [4] = {
  32                 .i2c_regs = (void *)(I2C_BASE + 0x4000),
  33                 .i2c_dma_regs = (void *)(I2C_DMA_BASE + 0x480),
  34                 .mt_i2c_flag = I2C_APDMA_ASYNC,
  35         },
  36         [5] = {
  37                 .i2c_regs = (void *)(I2C_BASE - 0x100000),
  38                 .i2c_dma_regs = (void *)(I2C_DMA_BASE + 0x500),
  39                 .mt_i2c_flag = I2C_APDMA_ASYNC,
  40         },
  41         [6] = {
  42                 .i2c_regs = (void *)(I2C_BASE - 0xFF000),
  43                 .i2c_dma_regs = (void *)(I2C_DMA_BASE + 0x580),
  44                 .mt_i2c_flag = I2C_APDMA_ASYNC,
  45         },
  46         [7] = {
  47                 .i2c_regs = (void *)(I2C_BASE - 0xFE000),
  48                 .i2c_dma_regs = (void *)(I2C_DMA_BASE + 0x600),
  49                 .mt_i2c_flag = I2C_APDMA_ASYNC,
  50         },
  51 };
  52
  53 _Static_assert(ARRAY_SIZE(mtk_i2c_bus_controller) == I2C_BUS_NUMBER,
  54                "Wrong size of mtk_i2c_bus_controller");
  55
  56 static const struct pad_func i2c_funcs[I2C_BUS_NUMBER][2] = {
  57         [0] = {
  58                 PAD_FUNC_UP(SDA0, SDA0),
  59                 PAD_FUNC_UP(SCL0, SCL0),
  60         },
  61         [1] = {
  62                 PAD_FUNC_UP(SDA1, SDA1),
  63                 PAD_FUNC_UP(SCL1, SCL1),
  64         },
  65         [2] = {
  66                 PAD_FUNC_UP(SDA2, SDA2),
  67                 PAD_FUNC_UP(SCL2, SCL2),
  68         },
  69         [3] = {
  70                 PAD_FUNC_UP(SDA3, SDA3),
  71                 PAD_FUNC_UP(SCL3, SCL3),
  72         },
  73         [4] = {
  74                 PAD_FUNC_UP(SDA4, SDA4),
  75                 PAD_FUNC_UP(SCL4, SCL4),
  76         },
  77         [5] = {
  78                 PAD_FUNC_DOWN(HDMIRX_SCL, SCL5),
  79                 PAD_FUNC_DOWN(HDMIRX_SDA, SDA5),
  80         },
  81         [6] = {
  82                 PAD_FUNC_DOWN(HDMITX_SCL, SCL6),
  83                 PAD_FUNC_DOWN(HDMITX_SDA, SDA6),
  84         },
  85         [7] = {
  86                 PAD_FUNC_DOWN(HDMIRX_HTPLG, SCL7),
  87                 PAD_FUNC_DOWN(HDMIRX_PWR5V, SDA7),
  88         },
  89
  90 };
  91
  92 static void mtk_i2c_set_gpio_pinmux(uint8_t bus)
  93 {
  94         assert(bus < I2C_BUS_NUMBER);
  95
  96         const struct pad_func *ptr = i2c_funcs[bus];
  97         for (size_t i = 0; i < 2; i++) {
  98                 gpio_set_mode(ptr[i].gpio, ptr[i].func);
  99                 if (bus <= I2C4)
 100                         gpio_set_pull(ptr[i].gpio, GPIO_PULL_ENABLE, ptr[i].select);
 101         }
 102 }
 103
 104 void mtk_i2c_bus_init(uint8_t bus, uint32_t speed)
 105 {
 106         mtk_i2c_speed_init(bus, speed);
 107         mtk_i2c_set_gpio_pinmux(bus);
 108 }
 109
 110 void mtk_i2c_dump_more_info(struct mt_i2c_regs *regs)
 111 {
 112         printk(BIOS_DEBUG, "LTIMING %x\nCLK_DIV %x\n",
 113                read32(&regs->ltiming),
 114                read32(&regs->clock_div));
 115 }
 116
 117 void mtk_i2c_config_timing(struct mt_i2c_regs *regs, struct mtk_i2c *bus_ctrl)
 118 {
 119         write32(&regs->clock_div, bus_ctrl->ac_timing.inter_clk_div);
 120         write32(&regs->timing, bus_ctrl->ac_timing.htiming);
 121         write32(&regs->ltiming, bus_ctrl->ac_timing.ltiming);
 122         write32(&regs->hs, bus_ctrl->ac_timing.hs);
 123         write32(&regs->ext_conf, bus_ctrl->ac_timing.ext);
 124 }