src/soc/mediatek/mt8196/i2c.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 /*
   4  * This file is created based on MT8196 Functional Specification
   5  * Chapter number: 13.5
   6  */
   7
   8 #include <assert.h>
   9 #include <console/console.h>
  10 #include <device/i2c_simple.h>
  11 #include <device/mmio.h>
  12 #include <soc/i2c.h>
  13 #include <soc/gpio.h>
  14
  15 struct mtk_i2c mtk_i2c_bus_controller[] = {
  16         [0] = {
  17                 .i2c_regs = (void *)(I2C0_BASE),
  18                 .i2c_dma_regs = (void *)(I2C0_DMA_BASE),
  19                 .mt_i2c_flag = I2C_APDMA_ASYNC,
  20         },
  21         [1] = {
  22                 .i2c_regs = (void *)(I2C1_BASE),
  23                 .i2c_dma_regs = (void *)(I2C1_DMA_BASE),
  24                 .mt_i2c_flag = I2C_APDMA_ASYNC,
  25         },
  26         [2] = {
  27                 .i2c_regs = (void *)(I2C2_BASE),
  28                 .i2c_dma_regs = (void *)(I2C2_DMA_BASE),
  29                 .mt_i2c_flag = I2C_APDMA_ASYNC,
  30         },
  31         [3] = {
  32                 .i2c_regs = (void *)(I2C3_BASE),
  33                 .i2c_dma_regs = (void *)(I2C3_DMA_BASE),
  34                 .mt_i2c_flag = I2C_APDMA_ASYNC,
  35         },
  36         [4] = {
  37                 .i2c_regs = (void *)(I2C4_BASE),
  38                 .i2c_dma_regs = (void *)(I2C4_DMA_BASE),
  39                 .mt_i2c_flag = I2C_APDMA_ASYNC,
  40         },
  41         [5] = {
  42                 .i2c_regs = (void *)(I2C5_BASE),
  43                 .i2c_dma_regs = (void *)(I2C5_DMA_BASE),
  44                 .mt_i2c_flag = I2C_APDMA_ASYNC,
  45         },
  46         [6] = {
  47                 .i2c_regs = (void *)(I2C6_BASE),
  48                 .i2c_dma_regs = (void *)(I2C6_DMA_BASE),
  49                 .mt_i2c_flag = I2C_APDMA_ASYNC,
  50         },
  51         [7] = {
  52                 .i2c_regs = (void *)(I2C7_BASE),
  53                 .i2c_dma_regs = (void *)(I2C7_DMA_BASE),
  54                 .mt_i2c_flag = I2C_APDMA_ASYNC,
  55         },
  56         [8] = {
  57                 .i2c_regs = (void *)(I2C8_BASE),
  58                 .i2c_dma_regs = (void *)(I2C8_DMA_BASE),
  59                 .mt_i2c_flag = I2C_APDMA_ASYNC,
  60         },
  61         [9] = {
  62                 .i2c_regs = (void *)(I2C9_BASE),
  63                 .i2c_dma_regs = (void *)(I2C9_DMA_BASE),
  64                 .mt_i2c_flag = I2C_APDMA_ASYNC,
  65         },
  66         [10] = {
  67                 .i2c_regs = (void *)(I2C10_BASE),
  68                 .i2c_dma_regs = (void *)(I2C10_DMA_BASE),
  69                 .mt_i2c_flag = I2C_APDMA_ASYNC,
  70         },
  71         [11] = {
  72                 .i2c_regs = (void *)(I2C11_BASE),
  73                 .i2c_dma_regs = (void *)(I2C11_DMA_BASE),
  74                 .mt_i2c_flag = I2C_APDMA_ASYNC,
  75         },
  76         [12] = {
  77                 .i2c_regs = (void *)(I2C12_BASE),
  78                 .i2c_dma_regs = (void *)(I2C12_DMA_BASE),
  79                 .mt_i2c_flag = I2C_APDMA_ASYNC,
  80         },
  81         [13] = {
  82                 .i2c_regs = (void *)(I2C13_BASE),
  83                 .i2c_dma_regs = (void *)(I2C13_DMA_BASE),
  84                 .mt_i2c_flag = I2C_APDMA_ASYNC,
  85         },
  86         [14] = {
  87                 .i2c_regs = (void *)(I2C14_BASE),
  88                 .i2c_dma_regs = (void *)(I2C14_DMA_BASE),
  89                 .mt_i2c_flag = I2C_APDMA_ASYNC,
  90         },
  91 };
  92
  93 _Static_assert(ARRAY_SIZE(mtk_i2c_bus_controller) == I2C_BUS_NUMBER,
  94                "Wrong size of mtk_i2c_bus_controller");
  95
  96 static const struct pad_func i2c_funcs[I2C_BUS_NUMBER][2] = {
  97         [0] = {
  98                 PAD_FUNC_UP(SDA0, SDA0),
  99                 PAD_FUNC_UP(SCL0, SCL0),
 100         },
 101         [1] = {
 102                 PAD_FUNC_UP(SDA1, SDA1),
 103                 PAD_FUNC_UP(SCL1, SCL1),
 104         },
 105         [2] = {
 106                 PAD_FUNC_UP(CAM_SDA2, SDA2),
 107                 PAD_FUNC_UP(CAM_SCL2, SCL2),
 108         },
 109         [3] = {
 110                 PAD_FUNC_UP(SDA3, SDA3),
 111                 PAD_FUNC_UP(SCL3, SCL3),
 112         },
 113         [4] = {
 114                 PAD_FUNC_UP(CAM_SDA4, SDA4),
 115                 PAD_FUNC_UP(CAM_SCL4, SCL4),
 116         },
 117         [5] = {
 118                 PAD_FUNC_UP(SDA5, SDA5),
 119                 PAD_FUNC_UP(SCL5, SCL5),
 120         },
 121         [6] = {
 122                 PAD_FUNC_UP(SDA6, SDA6),
 123                 PAD_FUNC_UP(SCL6, SCL6),
 124         },
 125         [7] = {
 126                 PAD_FUNC_UP(CAM_SDA7, SDA7),
 127                 PAD_FUNC_UP(CAM_SCL7, SCL7),
 128         },
 129         [8] = {
 130                 PAD_FUNC_UP(CAM_SDA8, SDA8),
 131                 PAD_FUNC_UP(CAM_SCL8, SCL8),
 132         },
 133         [9] = {
 134                 PAD_FUNC_UP(CAM_SDA9, SDA9),
 135                 PAD_FUNC_UP(CAM_SCL9, SCL9),
 136         },
 137         [10] = {
 138                 PAD_FUNC_UP(SDA10, SDA10),
 139                 PAD_FUNC_UP(SCL10, SCL10),
 140         },
 141         [11] = {
 142                 PAD_FUNC_UP(CAM_PDN3, SDA11),
 143                 PAD_FUNC_UP(CAM_PDN2, SCL11),
 144         },
 145         [12] = {
 146                 PAD_FUNC_UP(CAM_PDN5, SDA12),
 147                 PAD_FUNC_UP(CAM_PDN4, SCL12),
 148         },
 149         [13] = {
 150                 PAD_FUNC_UP(CAM_PDN7, SDA13),
 151                 PAD_FUNC_UP(CAM_PDN6, SCL13),
 152         },
 153         [14] = {
 154                 PAD_FUNC_UP(SCP_SDA3, SDA14),
 155                 PAD_FUNC_UP(SCP_SCL3, SCL14),
 156         },
 157 };
 158
 159 static void mtk_i2c_set_gpio_pinmux(uint8_t bus)
 160 {
 161         assert(bus < I2C_BUS_NUMBER);
 162
 163         const struct pad_func *ptr = i2c_funcs[bus];
 164
 165         for (size_t i = 0; i < 2; i++) {
 166                 gpio_set_mode(ptr[i].gpio, ptr[i].func);
 167                 gpio_set_pull(ptr[i].gpio, GPIO_PULL_ENABLE, ptr[i].select);
 168         }
 169 }
 170
 171 void mtk_i2c_bus_init(uint8_t bus, uint32_t speed)
 172 {
 173         mtk_i2c_speed_init(bus, speed);
 174         mtk_i2c_set_gpio_pinmux(bus);
 175 }
 176
 177 void mtk_i2c_dump_more_info(struct mt_i2c_regs *regs)
 178 {
 179         printk(BIOS_DEBUG, "LTIMING %x\nCLK_DIV %x\n",
 180                read32(&regs->ltiming),
 181                read32(&regs->clock_div));
 182 }
 183
 184 void mtk_i2c_config_timing(struct mt_i2c_regs *regs, struct mtk_i2c *bus_ctrl)
 185 {
 186         write32(&regs->clock_div, bus_ctrl->ac_timing.inter_clk_div);
 187         write32(&regs->timing, bus_ctrl->ac_timing.htiming);
 188         write32(&regs->ltiming, bus_ctrl->ac_timing.ltiming);
 189         write32(&regs->hs, bus_ctrl->ac_timing.hs);
 190         write32(&regs->ext_conf, bus_ctrl->ac_timing.ext);
 191 }