src/soc/mediatek/mt8196/spi.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 /*
   4  * This file is created based on MT8196 Functional Specification
   5  * Chapter number: 13.9
   6  */
   7
   8 #include <assert.h>
   9 #include <device/mmio.h>
  10 #include <gpio.h>
  11 #include <soc/addressmap.h>
  12 #include <soc/flash_controller_common.h>
  13 #include <soc/spi.h>
  14 #include <spi_flash.h>
  15
  16 struct mtk_spi_bus spi_bus[SPI_BUS_NUMBER] = {
  17         {
  18                 .regs = (void *)SPI0_BASE,
  19                 .cs_gpio = GPIO(SPI0_CSB),
  20         },
  21         {
  22                 .regs = (void *)SPI1_BASE,
  23                 .cs_gpio = GPIO(SPI1_CSB),
  24         },
  25         {
  26                 .regs = (void *)SPI2_BASE,
  27                 .cs_gpio = GPIO(EINT31),
  28         },
  29         {
  30                 .regs = (void *)SPI3_BASE,
  31                 .cs_gpio = GPIO(INT_SIM2),
  32         },
  33         {
  34                 .regs = (void *)SPI4_BASE,
  35                 .cs_gpio = GPIO(SPI_CSB_SEC),
  36         },
  37         {
  38                 .regs = (void *)SPI5_BASE,
  39                 .cs_gpio = GPIO(SPI5_CSB),
  40         },
  41         {
  42                 .regs = (void *)SPI6_BASE,
  43                 .cs_gpio = GPIO(I2SIN1_LRCK),
  44         },
  45         {
  46                 .regs = (void *)SPI7_BASE,
  47                 .cs_gpio = GPIO(EINT6),
  48         },
  49 };
  50
  51 static const struct pad_func pad_funcs[SPI_BUS_NUMBER][4] = {
  52         {
  53                 PAD_FUNC_DOWN(SPI0_MI, SPI0_MI),
  54                 PAD_FUNC_GPIO(SPI0_CSB),
  55                 PAD_FUNC_DOWN(SPI0_MO, SPI0_MO),
  56                 PAD_FUNC_DOWN(SPI0_CLK, SPI0_CLK),
  57         },
  58         {
  59                 PAD_FUNC_DOWN(SPI1_MI, SPI1_MI),
  60                 PAD_FUNC_GPIO(SPI1_CSB),
  61                 PAD_FUNC_DOWN(SPI1_MO, SPI1_MO),
  62                 PAD_FUNC_DOWN(SPI1_CLK, SPI1_CLK),
  63         },
  64         {
  65                 PAD_FUNC_DOWN(EINT28, SPI2_A_MI),
  66                 PAD_FUNC_GPIO(EINT31),
  67                 PAD_FUNC_DOWN(EINT29, SPI2_A_MO),
  68                 PAD_FUNC_DOWN(EINT30, SPI2_A_CLK),
  69         },
  70         {
  71                 PAD_FUNC_DOWN(EINT1, SPI3_A_MI),
  72                 PAD_FUNC_GPIO(INT_SIM2),
  73                 PAD_FUNC_DOWN(EINT0, SPI3_A_MO),
  74                 PAD_FUNC_DOWN(INT_SIM1, SPI3_A_CLK),
  75         },
  76         {
  77                 PAD_FUNC_DOWN(SPI_MI_SEC, SPI4_A_MI),
  78                 PAD_FUNC_GPIO(SPI_CSB_SEC),
  79                 PAD_FUNC_DOWN(SPI_MO_SEC, SPI4_A_MO),
  80                 PAD_FUNC_DOWN(SPI_CLK_SEC, SPI4_A_CLK),
  81         },
  82         {
  83                 PAD_FUNC_DOWN(SPI5_MI, SPI5_MI),
  84                 PAD_FUNC_GPIO(SPI5_CSB),
  85                 PAD_FUNC_DOWN(SPI5_MO, SPI5_MO),
  86                 PAD_FUNC_DOWN(SPI5_CLK, SPI5_CLK),
  87         },
  88         {
  89                 PAD_FUNC_DOWN(I2SOUT1_DO, SPI6_A_MI),
  90                 PAD_FUNC_GPIO(I2SIN1_LRCK),
  91                 PAD_FUNC_DOWN(I2SIN1_DI, SPI6_A_MO),
  92                 PAD_FUNC_DOWN(I2SIN1_BCK, SPI6_A_CLK),
  93         },
  94         {
  95                 PAD_FUNC_DOWN(EINT8, SPI7_A_MI),
  96                 PAD_FUNC_GPIO(EINT6),
  97                 PAD_FUNC_DOWN(EINT7, SPI7_A_MO),
  98                 PAD_FUNC_DOWN(EINT5, SPI7_A_CLK),
  99         },
 100 };
 101
 102 static const struct pad_func nor_pinmux[4] = {
 103         PAD_FUNC(SDA10, SF_CK, GPIO_PULL_DOWN),
 104         PAD_FUNC(SCL10, SF_CS, GPIO_PULL_UP),
 105         PAD_FUNC(PERIPHERAL_EN5, SF_D0, GPIO_PULL_DOWN),
 106         PAD_FUNC(PERIPHERAL_EN6, SF_D1, GPIO_PULL_DOWN),
 107 };
 108
 109 void mtk_snfc_init(void)
 110 {
 111         for (size_t i = 0; i < ARRAY_SIZE(nor_pinmux); i++)
 112                 mtk_snfc_init_pad_func(&nor_pinmux[i], GPIO_DRV_14_MA);
 113 }
 114
 115 void mtk_spi_set_gpio_pinmux(unsigned int bus, enum spi_pad_mask pad_select)
 116 {
 117         assert(bus < SPI_BUS_NUMBER);
 118         const struct pad_func *ptr;
 119
 120         ptr = pad_funcs[bus];
 121
 122         for (unsigned int i = 0; i < ARRAY_SIZE(pad_funcs[0]); i++)
 123                 gpio_set_mode(ptr[i].gpio, ptr[i].func);
 124 }
 125
 126 static const struct spi_ctrlr spi_flash_ctrlr = {
 127         .max_xfer_size = 65535,
 128         .flash_probe = mtk_spi_flash_probe,
 129 };
 130
 131 const struct spi_ctrlr_buses spi_ctrlr_bus_map[] = {
 132         {
 133                 .ctrlr = &spi_ctrlr,
 134                 .bus_start = 0,
 135                 .bus_end = SPI_BUS_NUMBER - 1,
 136         },
 137         {
 138                 .ctrlr = &spi_flash_ctrlr,
 139                 .bus_start = CONFIG_BOOT_DEVICE_SPI_FLASH_BUS,
 140                 .bus_end = CONFIG_BOOT_DEVICE_SPI_FLASH_BUS,
 141         },
 142 };
 143
 144 const size_t spi_ctrlr_bus_map_count = ARRAY_SIZE(spi_ctrlr_bus_map);