1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <device/mmio.h>
4 #include <soc/addressmap.h>
19 struct pwm_ctl pwm
[4];
23 check_member(rk_pwm_regs
, int_en
, 0x44);
25 #define RK_PWM_DISABLE (0 << 0)
26 #define RK_PWM_ENABLE (1 << 0)
28 #define PWM_ONE_SHOT (0 << 1)
29 #define PWM_CONTINUOUS (1 << 1)
30 #define RK_PWM_CAPTURE (1 << 2)
32 #define PWM_DUTY_POSTIVE (1 << 3)
33 #define PWM_DUTY_NEGATIVE (0 << 3)
35 #define PWM_INACTIVE_POSTIVE (1 << 4)
36 #define PWM_INACTIVE_NEGATIVE (0 << 4)
38 #define PWM_OUTPUT_LEFT (0 << 5)
39 #define PWM_OUTPUT_CENTER (1 << 5)
41 #define PWM_LP_ENABLE (1 << 8)
42 #define PWM_LP_DISABLE (0 << 8)
44 #define PWM_SEL_SCALE_CLK (1 << 9)
45 #define PWM_SEL_SRC_CLK (0 << 9)
47 struct rk_pwm_regs
*rk_pwm
= (void *)RK_PWM_BASE
;
49 void pwm_init(u32 id
, u32 period_ns
, u32 duty_ns
)
51 unsigned long period
, duty
;
53 #if CONFIG(SOC_ROCKCHIP_RK3288)
55 write32(&rk3288_grf
->soc_con2
, RK_SETBITS(1 << 0));
58 write32(&rk_pwm
->pwm
[id
].pwm_ctrl
, PWM_SEL_SRC_CLK
|
59 PWM_OUTPUT_LEFT
| PWM_LP_DISABLE
| PWM_CONTINUOUS
|
60 PWM_DUTY_POSTIVE
| PWM_INACTIVE_POSTIVE
| RK_PWM_DISABLE
);
62 period
= (PWM_CLOCK_HZ
/ 1000) * period_ns
/ USECS_PER_SEC
;
63 duty
= (PWM_CLOCK_HZ
/ 1000) * duty_ns
/ USECS_PER_SEC
;
65 write32(&rk_pwm
->pwm
[id
].pwm_period_hpr
, period
);
66 write32(&rk_pwm
->pwm
[id
].pwm_duty_lpr
, duty
);
67 setbits32(&rk_pwm
->pwm
[id
].pwm_ctrl
, RK_PWM_ENABLE
);