src/soc/rockchip/rk3399/Makefile.mk

   1 ## SPDX-License-Identifier: GPL-2.0-only
   2
   3 ifeq ($(CONFIG_SOC_ROCKCHIP_RK3399),y)
   4
   5 IDBTOOL = util/rockchip/make_idb.py
   6
   7 decompressor-y += decompressor.c
   8 decompressor-y += timer.c
   9
  10 bootblock-y += ../common/i2c.c
  11 bootblock-y += ../common/spi.c
  12 bootblock-y += ../common/uart.c
  13 bootblock-y += ../common/gpio.c
  14 bootblock-y += ../common/pwm.c
  15 bootblock-y += bootblock.c
  16 bootblock-y += clock.c
  17 bootblock-y += gpio.c
  18 bootblock-y += saradc.c
  19 bootblock-y += timer.c
  20
  21 verstage-y += ../common/gpio.c
  22 verstage-y += gpio.c
  23 verstage-y += sdram.c
  24 verstage-y += ../common/i2c.c
  25 verstage-y += ../common/spi.c
  26 verstage-y += ../common/uart.c
  27 verstage-y += clock.c
  28 verstage-y += timer.c
  29
  30 ################################################################################
  31
  32 romstage-y += ../common/cbmem.c
  33 romstage-y += sdram.c
  34 romstage-y += ../common/spi.c
  35 romstage-y += ../common/uart.c
  36 romstage-y += clock.c
  37 romstage-y += ../common/pwm.c
  38 romstage-y += timer.c
  39 romstage-y += tsadc.c
  40 romstage-y += usb.c
  41 romstage-y += gpio.c
  42 romstage-y += saradc.c
  43 romstage-y += ../common/gpio.c
  44 romstage-y += ../common/i2c.c
  45
  46 ################################################################################
  47
  48 ramstage-y += sdram.c
  49 ramstage-y += ../common/spi.c
  50 ramstage-y += ../common/uart.c
  51 ramstage-y += clock.c
  52 ramstage-$(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) += display.c
  53 ramstage-$(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) += ../common/edp.c
  54 ramstage-$(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) += mipi.c
  55 ramstage-y += ../common/gpio.c
  56 ramstage-y += gpio.c
  57 ramstage-y += ../common/i2c.c
  58 ramstage-y += saradc.c
  59 ramstage-y += soc.c
  60 ramstage-y += timer.c
  61 ramstage-$(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) += ../common/vop.c
  62 ramstage-y += usb.c
  63
  64 BL31_MAKEARGS += PLAT=rk3399 M0_CROSS_COMPILE="$(CROSS_COMPILE_arm)"
  65 ################################################################################
  66
  67 CPPFLAGS_common += -Isrc/soc/rockchip/rk3399/include
  68 CPPFLAGS_common += -Isrc/soc/rockchip/common/include
  69
  70 $(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin
  71         @printf "Generating: $(subst $(obj)/,,$(@))\n"
  72         $(Q)mkdir -p $(dir $@)
  73         $(Q)$(IDBTOOL) --from=$< --to=$@ --enable-align --chip=RK33
  74
  75 endif