1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <device/mmio.h>
7 #include <soc/saradc.h>
11 struct rk3399_saradc_regs
{
17 check_member(rk3399_saradc_regs
, dly_pu_soc
, 0xc);
19 struct rk3399_saradc_regs
*rk3399_saradc
= (void *)SARADC_BASE
;
21 /* SARADC_STAS: conversion done */
25 #define INT_EN (1 << 5)
26 #define ADC_PWR_CTRL (1 << 3)
27 #define ADC_CHN_SEL_MASK 7
28 #define ADC_CHN_SEL_SHIFT 0
30 /* SARADC_DATA, 10[0:9] bits */
31 #define DATA_MASK 0x3FF
33 #define SARADC_HZ (4*MHz)
35 #define SARADC_MAX_CHANNEL 6
37 #define SARADC_DELAY_PU (1 * 1000 * 1000 * 1000 / SARADC_HZ * 4)
39 u32
get_saradc_value(u32 chn
)
44 assert(chn
< SARADC_MAX_CHANNEL
);
45 rkclk_configure_saradc(SARADC_HZ
);
47 /* power down adc converter */
48 clrbits32(&rk3399_saradc
->ctrl
, ADC_PWR_CTRL
);
51 clrsetbits32(&rk3399_saradc
->ctrl
,
52 ADC_CHN_SEL_MASK
<< ADC_CHN_SEL_SHIFT
,
53 chn
<< ADC_CHN_SEL_SHIFT
);
56 setbits32(&rk3399_saradc
->ctrl
, ADC_PWR_CTRL
);
58 udelay(SARADC_DELAY_PU
);
60 stopwatch_init_msecs_expire(&sw
, 10);
62 if (read32(&rk3399_saradc
->stas
) == ADC_STOP
) {
63 adc_value
= read32(&rk3399_saradc
->data
) & DATA_MASK
;
66 } while (!stopwatch_expired(&sw
));