drivers/wifi: Remove unnecessary data structure copy
[coreboot2.git] / src / vendorcode / amd / pi / 00730F01 / Include / IdsPerf.h
blob16ee98577bd6f2f06bc632093d47a5a39503ec96
1 /* SPDX-License-Identifier: BSD-3-Clause */
3 /* $NoKeywords:$ */
4 /**
5 * @file
7 * AMD Integrated Debug Routines for performance analysis
9 * Contains AMD AGESA debug macros and functions for performance analysis
11 * @xrefitem bom "File Content Label" "Release Content"
12 * @e project: AGESA
13 * @e sub-project: IDS
14 * @e \$Revision: 281178 $ @e \$Date: 2013-12-18 02:14:15 -0600 (Wed, 18 Dec 2013) $
16 /*****************************************************************************
18 * Copyright (c) 2008 - 2014, Advanced Micro Devices, Inc.
19 * All rights reserved.
21 * Redistribution and use in source and binary forms, with or without
22 * modification, are permitted provided that the following conditions are met:
23 * * Redistributions of source code must retain the above copyright
24 * notice, this list of conditions and the following disclaimer.
25 * * Redistributions in binary form must reproduce the above copyright
26 * notice, this list of conditions and the following disclaimer in the
27 * documentation and/or other materials provided with the distribution.
28 * * Neither the name of Advanced Micro Devices, Inc. nor the names of
29 * its contributors may be used to endorse or promote products derived
30 * from this software without specific prior written permission.
32 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
33 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
34 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
35 * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
36 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
37 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
38 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
39 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
40 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
41 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
43 ***************************************************************************/
45 #ifndef _IDS_PERFORMANCE_DATA_POINT
47 #define _IDS_PERFORMANCE_DATA_POINT
48 #define IDS_PERF_VERSION 0x00010000ul //version number 0.1.0.0
49 /// Time points performance function used
50 typedef enum {
51 TP_BEGINPROCAMDINITEARLY = 0x100, ///< BeginProcAmdInitEarly
52 TP_ENDPROCAMDINITEARLY = 0x101, ///< EndProcAmdInitEarly
53 TP_BEGINAMDTOPOINITIALIZE = 0x102, ///< BeginAmdTopoInitialize
54 TP_ENDAMDTOPOINITIALIZE = 0x103, ///< EndAmdTopoInitialize
55 TP_BEGINGNBINITATEARLIER = 0x104, ///< BeginGnbInitAtEarlier
56 TP_ENDGNBINITATEARLIER = 0x105, ///< EndGnbInitAtEarlier
57 TP_BEGINAMDCPUEARLY = 0x106, ///< BeginAmdCpuEarly
58 TP_ENDAMDCPUEARLY = 0x107, ///< EndAmdCpuEarly
59 TP_BEGINGNBINITATEARLY = 0x108, ///< BeginGnbInitAtEarly
60 TP_ENDGNBINITATEARLY = 0x109, ///< EndGnbInitAtEarly
61 TP_BEGINPROCAMDINITENV = 0x10A, ///< BeginProcAmdInitEnv
62 TP_ENDPROCAMDINITENV = 0x10B, ///< EndProcAmdInitEnv
63 TP_BEGININITENV = 0x10C, ///< BeginInitEnv
64 TP_ENDINITENV = 0x10D, ///< EndInitEnv
65 TP_BEGINGNBINITATENV = 0x10E, ///< BeginGnbInitAtEnv
66 TP_ENDGNBINITATENV = 0x10F, ///< EndGnbInitAtEnv
67 TP_BEGINPROCAMDINITLATE = 0x110, ///< BeginProcAmdInitLate
68 TP_ENDPROCAMDINITLATE = 0x111, ///< EndProcAmdInitLate
69 TP_BEGINCREATSYSTEMTABLE = 0x112, ///< BeginCreatSystemTable
70 TP_ENDCREATSYSTEMTABLE = 0x113, ///< EndCreatSystemTable
71 TP_BEGINDISPATCHCPUFEATURESLATE = 0x114, ///< BeginDispatchCpuFeaturesLate
72 TP_ENDDISPATCHCPUFEATURESLATE = 0x115, ///< EndDispatchCpuFeaturesLate
73 TP_BEGINAMDCPULATE = 0x116, ///< BeginAmdCpuLate
74 TP_ENDAMDCPULATE = 0x117, ///< EndAmdCpuLate
75 TP_BEGINGNBINITATLATE = 0x118, ///< BeginGnbInitAtLate
76 TP_ENDGNBINITATLATE = 0x119, ///< EndGnbInitAtLate
77 TP_BEGINPROCAMDINITMID = 0x11A, ///< BeginProcAmdInitMid
78 TP_ENDPROCAMDINITMID = 0x11B, ///< EndProcAmdInitMid
79 TP_BEGININITMID = 0x11E, ///< BeginInitMid
80 TP_ENDINITMID = 0x11F, ///< EndInitMid
81 TP_BEGINGNBINITATMID = 0x120, ///< BeginGnbInitAtMid
82 TP_ENDGNBINITATMID = 0x121, ///< EndGnbInitAtMid
83 TP_BEGINPROCAMDINITPOST = 0x122, ///< BeginProcAmdInitPost
84 TP_ENDPROCAMDINITPOST = 0x123, ///< EndProcAmdInitPost
85 TP_BEGINGNBINITATPOST = 0x124, ///< BeginGnbInitAtPost
86 TP_ENDGNBINITATPOST = 0x125, ///< EndGnbInitAtPost
87 TP_BEGINAMDMEMAUTO = 0x126, ///< BeginAmdMemAuto
88 TP_ENDAMDMEMAUTO = 0x127, ///< EndAmdMemAuto
89 TP_BEGINAMDCPUPOST = 0x128, ///< BeginAmdCpuPost
90 TP_ENDAMDCPUPOST = 0x129, ///< EndAmdCpuPost
91 TP_BEGINGNBINITATPOSTAFTERDRAM = 0x12A, ///< BeginGnbInitAtPostAfterDram
92 TP_ENDGNBINITATPOSTAFTERDRAM = 0x12B, ///< EndGnbInitAtPostAfterDram
93 TP_BEGINPROCAMDINITRESET = 0x12C, ///< BeginProcAmdInitReset
94 TP_ENDPROCAMDINITRESET = 0x12D, ///< EndProcAmdInitReset
95 TP_BEGININITRESET = 0x12E, ///< BeginInitReset
96 TP_ENDINITRESET = 0x12F, ///< EndInitReset
97 TP_BEGINHTINITRESET = 0x130, ///< BeginHtInitReset
98 TP_ENDHTINITRESET = 0x131, ///< EndHtInitReset
99 TP_BEGINPROCAMDINITRESUME = 0x132, ///< BeginProcAmdInitResume
100 TP_ENDPROCAMDINITRESUME = 0x133, ///< EndProcAmdInitResume
101 TP_BEGINAMDMEMS3RESUME = 0x134, ///< BeginAmdMemS3Resume
102 TP_ENDAMDMEMS3RESUME = 0x135, ///< EndAmdMemS3Resume
103 TP_BEGINDISPATCHCPUFEATURESS3RESUME = 0x136, ///< BeginDispatchCpuFeaturesS3Resume
104 TP_ENDDISPATCHCPUFEATURESS3RESUME = 0x137, ///< EndDispatchCpuFeaturesS3Resume
105 TP_BEGINSETCORESTSCFREQSEL = 0x138, ///< BeginSetCoresTscFreqSel
106 TP_ENDSETCORESTSCFREQSEL = 0x139, ///< EndSetCoresTscFreqSel
107 TP_BEGINMEMFMCTMEMCLR_INIT = 0x13A, ///< BeginMemFMctMemClr_Init
108 TP_ENDNMEMFMCTMEMCLR_INIT = 0x13B, ///< EndnMemFMctMemClr_Init
109 TP_BEGINMEMBEFOREMEMDATAINIT = 0x13C, ///< BeginMemBeforeMemDataInit
110 TP_ENDMEMBEFOREMEMDATAINIT = 0x13D, ///< EndMemBeforeMemDataInit
111 TP_BEGINPROCAMDMEMAUTO = 0x13E, ///< BeginProcAmdMemAuto
112 TP_ENDPROCAMDMEMAUTO = 0x13F, ///< EndProcAmdMemAuto
113 TP_BEGINMEMMFLOWC32 = 0x140, ///< BeginMemMFlowC32
114 TP_ENDMEMMFLOWC32 = 0x141, ///< EndMemMFlowC32
115 TP_BEGINMEMINITIALIZEMCT = 0x142, ///< BeginMemInitializeMCT
116 TP_ENDMEMINITIALIZEMCT = 0x143, ///< EndMemInitializeMCT
117 TP_BEGINMEMSYSTEMMEMORYMAPPING = 0x144, ///< BeginMemSystemMemoryMapping
118 TP_ENDMEMSYSTEMMEMORYMAPPING = 0x145, ///< EndMemSystemMemoryMapping
119 TP_BEGINMEMDRAMTRAINING = 0x146, ///< BeginMemDramTraining
120 TP_ENDMEMDRAMTRAINING = 0x147, ///< EndMemDramTraining
121 TP_BEGINMEMOTHERTIMING = 0x148, ///< BeginMemOtherTiming
122 TP_ENDMEMOTHERTIMING = 0x149, ///< EndMemOtherTiming
123 TP_BEGINMEMUMAMEMTYPING = 0x14A, ///< BeginMemUMAMemTyping
124 TP_ENDMEMUMAMEMTYPING = 0x14B, ///< EndMemUMAMemTyping
125 TP_BEGINMEMMEMCLR = 0x14C, ///< BeginMemMemClr
126 TP_ENDMEMMEMCLR = 0x14D, ///< EndMemMemClr
127 TP_BEGINMEMMFLOWTN = 0x14E, ///< BeginMemMFlowTN
128 TP_ENDMEMMFLOWTN = 0x14F, ///< EndMemMFlowTN
129 TP_BEGINAGESAHOOKBEFOREDRAMINIT = 0x150, ///< BeginAgesaHookBeforeDramInit
130 TP_ENDAGESAHOOKBEFOREDRAMINIT = 0x151, ///< EndAgesaHookBeforeDramInit
131 TP_BEGINPROCMEMDRAMTRAINING = 0x152, ///< BeginProcMemDramTraining
132 TP_ENDPROCMEMDRAMTRAINING = 0x153, ///< EndProcMemDramTraining
133 TP_BEGINGNBINITATS3SAVE = 0x154, ///< BeginGnbInitAtS3Save
134 TP_ENDGNBINITATS3SAVE = 0x155, ///< EndGnbInitAtS3Save
135 TP_BEGINGNBLOADSCSDATA = 0x156, ///< BeginGnbLoadScsData
136 TP_ENDGNBLOADSCSDATA = 0x157, ///< EndGnbLoadScsData
137 TP_BEGINGNBPCIETRAINING = 0x158, ///< BeginGnbPcieTraining
138 TP_ENDGNBPCIETRAINING = 0x159, ///< EndGnbPcieTraining
139 TP_BEGINDISPATCHCPUFEATURESS3SAVE = 0x15A, ///< BeginDispatchCpuFeaturesS3Save
140 TP_ENDDISPATCHCPUFEATURESS3SAVE = 0x15B, ///< EndDispatchCpuFeaturesS3Save
141 IDS_TP_END ///< End of IDS TP list
142 } IDS_PERF_DATA;
143 #endif