1 /* SPDX-License-Identifier: BSD-3-Clause */
7 * AGESA options structures
9 * Contains options control structures for the AGESA build options
11 * @xrefitem bom "File Content Label" "Release Content"
13 * @e sub-project: Core
14 * @e \$Revision: 281178 $ @e \$Date: 2013-12-18 02:14:15 -0600 (Wed, 18 Dec 2013) $
16 /*****************************************************************************
18 * Copyright (c) 2008 - 2014, Advanced Micro Devices, Inc.
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22 * modification, are permitted provided that the following conditions are met:
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43 ***************************************************************************/
49 * Provide topology limits for loops and runtime, based on supported families.
52 UINT32 PlatformNumberOfSockets
; ///< The limit to the number of processors based on
53 ///< supported families and other build options.
54 UINT32 PlatformNumberOfModules
; ///< The limit to the number of modules in a processor, based
55 ///< on supported families.
56 } OPTIONS_CONFIG_TOPOLOGY
;
61 * The push high dispatcher uses this table to find what entries are currently in the build image.
64 UINT32 FunctionId
; ///< The function id specified.
65 IMAGE_ENTRY EntryPoint
; ///< The corresponding entry point to call.