1 /* SPDX-License-Identifier: GPL-2.0-only */
8 /* Pad configuration was generated automatically using intelp2m utility */
9 static const struct pad_config gpio_table
[] = {
11 /* ------- GPIO Community 0 ------- */
12 /* ------- GPIO Group GPP_A ------- */
15 PAD_CFG_NF(GPP_A0
, NONE
, DEEP
, NF1
),
17 PAD_CFG_NF(GPP_A1
, NATIVE
, DEEP
, NF1
),
19 PAD_CFG_NF(GPP_A2
, NATIVE
, DEEP
, NF1
),
21 PAD_CFG_NF(GPP_A3
, NATIVE
, DEEP
, NF1
),
23 PAD_CFG_NF(GPP_A4
, NATIVE
, DEEP
, NF1
),
24 /* GPP_A5 - LFRAME# */
25 PAD_CFG_NF(GPP_A5
, NONE
, DEEP
, NF1
),
27 PAD_CFG_NF(GPP_A6
, NONE
, DEEP
, NF1
),
29 PAD_CFG_NF(GPP_A7
, NONE
, DEEP
, NF1
),
30 /* GPP_A8 - CLKRUN# */
31 PAD_CFG_NF(GPP_A8
, NONE
, PLTRST
, NF1
),
32 /* GPP_A9 - CLKOUT_LPC0 */
33 PAD_CFG_NF(GPP_A9
, DN_20K
, DEEP
, NF1
),
34 /* GPP_A10 - CLKOUT_LPC1 */
35 PAD_CFG_NF(GPP_A10
, DN_20K
, DEEP
, NF1
),
37 PAD_CFG_NF(GPP_A11
, UP_20K
, DEEP
, NF1
),
39 PAD_NC(GPP_A12
, NONE
),
41 PAD_NC(GPP_A13
, NONE
),
43 PAD_NC(GPP_A14
, NONE
),
45 PAD_NC(GPP_A15
, NONE
),
47 PAD_NC(GPP_A16
, NONE
),
49 PAD_NC(GPP_A17
, NONE
),
51 PAD_NC(GPP_A18
, NONE
),
53 PAD_NC(GPP_A19
, NONE
),
55 PAD_NC(GPP_A20
, NONE
),
57 PAD_NC(GPP_A21
, NONE
),
59 PAD_NC(GPP_A22
, NONE
),
61 PAD_NC(GPP_A23
, NONE
),
63 /* ------- GPIO Group GPP_B ------- */
65 /* GPP_B0 - CORE_VID0 */
67 /* GPP_B1 - CORE_VID1 */
86 PAD_NC(GPP_B10
, NONE
),
87 /* GPP_B11 - EXT_PWR_GATE# */
88 PAD_NC(GPP_B11
, NONE
),
89 /* GPP_B12 - SLP_S0# */
90 PAD_CFG_NF(GPP_B12
, NONE
, DEEP
, NF1
),
91 /* GPP_B13 - PLTRST# */
92 PAD_CFG_NF(GPP_B13
, NONE
, DEEP
, NF1
),
94 PAD_CFG_NF(GPP_B14
, DN_20K
, PLTRST
, NF1
),
96 PAD_NC(GPP_B15
, NONE
),
98 PAD_NC(GPP_B16
, NONE
),
100 PAD_NC(GPP_B17
, NONE
),
102 PAD_NC(GPP_B18
, NONE
),
104 PAD_NC(GPP_B19
, NONE
),
106 PAD_NC(GPP_B20
, NONE
),
108 PAD_NC(GPP_B21
, NONE
),
110 PAD_NC(GPP_B22
, NONE
),
112 PAD_NC(GPP_B23
, NONE
),
114 /* ------- GPIO Group GPP_G ------- */
117 PAD_NC(GPP_G0
, NONE
),
119 PAD_NC(GPP_G1
, NONE
),
121 PAD_NC(GPP_G2
, NONE
),
123 PAD_NC(GPP_G3
, NONE
),
125 PAD_NC(GPP_G4
, NONE
),
126 /* GPP_G5 - SD3_CD# */
127 PAD_NC(GPP_G5
, NONE
),
129 PAD_NC(GPP_G6
, NONE
),
130 /* GPP_G7 - SD3_WP */
131 PAD_NC(GPP_G7
, NONE
),
133 /* ------- GPIO Group SPI ------- */
135 /* ------- GPIO Community 1 ------- */
137 /* ------- GPIO Group GPP_D ------- */
140 PAD_NC(GPP_D0
, NONE
),
142 PAD_NC(GPP_D1
, NONE
),
144 PAD_NC(GPP_D2
, NONE
),
146 PAD_NC(GPP_D3
, NONE
),
148 PAD_NC(GPP_D4
, NONE
),
150 PAD_NC(GPP_D5
, NONE
),
152 PAD_NC(GPP_D6
, NONE
),
154 PAD_NC(GPP_D7
, NONE
),
156 PAD_NC(GPP_D8
, NONE
),
158 PAD_NC(GPP_D9
, NONE
),
160 PAD_NC(GPP_D10
, NONE
),
162 PAD_NC(GPP_D11
, NONE
),
164 PAD_NC(GPP_D12
, NONE
),
166 PAD_NC(GPP_D13
, NONE
),
168 PAD_NC(GPP_D14
, NONE
),
170 PAD_NC(GPP_D15
, NONE
),
172 PAD_NC(GPP_D16
, NONE
),
174 PAD_NC(GPP_D17
, NONE
),
176 PAD_NC(GPP_D18
, NONE
),
178 PAD_NC(GPP_D19
, NONE
),
180 PAD_NC(GPP_D20
, NONE
),
181 /* GPP_D21 - SPI1_IO2 */
182 PAD_NC(GPP_D21
, NONE
),
183 /* GPP_D22 - SPI1_IO3 */
184 PAD_NC(GPP_D22
, NONE
),
186 PAD_NC(GPP_D23
, NONE
),
188 /* ------- GPIO Group GPP_F ------- */
191 PAD_NC(GPP_F0
, NONE
),
193 PAD_NC(GPP_F1
, NONE
),
195 PAD_NC(GPP_F2
, NONE
),
197 PAD_NC(GPP_F3
, NONE
),
199 PAD_NC(GPP_F4
, NONE
),
201 PAD_NC(GPP_F5
, NONE
),
203 PAD_NC(GPP_F6
, NONE
),
205 PAD_NC(GPP_F7
, NONE
),
207 PAD_NC(GPP_F8
, NONE
),
209 PAD_NC(GPP_F9
, NONE
),
211 PAD_NC(GPP_F10
, NONE
),
212 /* GPP_F11 - EMMC_CMD */
213 PAD_CFG_NF(GPP_F11
, NONE
, DEEP
, NF1
),
214 /* GPP_F12 - EMMC_DATA0 */
215 PAD_CFG_NF(GPP_F12
, NONE
, DEEP
, NF1
),
216 /* GPP_F13 - EMMC_DATA1 */
217 PAD_CFG_NF(GPP_F13
, NONE
, DEEP
, NF1
),
218 /* GPP_F14 - EMMC_DATA2 */
219 PAD_CFG_NF(GPP_F14
, NONE
, DEEP
, NF1
),
220 /* GPP_F15 - EMMC_DATA3 */
221 PAD_CFG_NF(GPP_F15
, NONE
, DEEP
, NF1
),
222 /* GPP_F16 - EMMC_DATA4 */
223 PAD_CFG_NF(GPP_F16
, NONE
, DEEP
, NF1
),
224 /* GPP_F17 - EMMC_DATA5 */
225 PAD_CFG_NF(GPP_F17
, NONE
, DEEP
, NF1
),
226 /* GPP_F18 - EMMC_DATA6 */
227 PAD_CFG_NF(GPP_F18
, NONE
, DEEP
, NF1
),
228 /* GPP_F19 - EMMC_DATA7 */
229 PAD_CFG_NF(GPP_F19
, NONE
, DEEP
, NF1
),
230 /* GPP_F20 - EMMC_RCLK */
231 PAD_CFG_NF(GPP_F20
, NONE
, DEEP
, NF1
),
232 /* GPP_F21 - EMMC_CLK */
233 PAD_CFG_NF(GPP_F21
, NONE
, DEEP
, NF1
),
234 /* GPP_F22 - EMMC_RESET# */
235 PAD_CFG_NF(GPP_F22
, NONE
, DEEP
, NF1
),
237 PAD_NC(GPP_F23
, NONE
),
239 /* ------- GPIO Group GPP_H ------- */
242 PAD_NC(GPP_H0
, NONE
),
244 PAD_NC(GPP_H1
, NONE
),
246 PAD_NC(GPP_H2
, NONE
),
248 PAD_NC(GPP_H3
, NONE
),
250 PAD_NC(GPP_H4
, NONE
),
252 PAD_NC(GPP_H5
, NONE
),
254 PAD_NC(GPP_H6
, NONE
),
256 PAD_NC(GPP_H7
, NONE
),
258 PAD_NC(GPP_H8
, NONE
),
260 PAD_NC(GPP_H9
, NONE
),
262 PAD_NC(GPP_H10
, NONE
),
264 PAD_NC(GPP_H11
, NONE
),
266 PAD_NC(GPP_H12
, NONE
),
268 PAD_NC(GPP_H13
, NONE
),
270 PAD_NC(GPP_H14
, NONE
),
272 PAD_NC(GPP_H15
, NONE
),
274 PAD_NC(GPP_H16
, NONE
),
276 PAD_NC(GPP_H17
, NONE
),
277 /* GPP_H18 - CPU_C10_GATE# */
278 PAD_CFG_NF(GPP_H18
, NONE
, DEEP
, NF1
),
280 PAD_NC(GPP_H19
, NONE
),
282 PAD_NC(GPP_H20
, NONE
),
284 PAD_NC(GPP_H21
, NONE
),
286 PAD_NC(GPP_H22
, NONE
),
288 PAD_NC(GPP_H23
, NONE
),
290 /* ------- GPIO Group VGPIO ------- */
292 /* ------- GPIO Community 2 ------- */
294 /* ------- GPIO Group GPD ------- */
297 PAD_CFG_NF(GPD0
, NONE
, RSMRST
, NF1
),
298 /* GPD1 - ACPRESENT */
299 PAD_CFG_NF(GPD1
, NATIVE
, RSMRST
, NF1
),
300 /* GPD2 - LAN_WAKE# */
301 PAD_CFG_NF(GPD2
, NATIVE
, RSMRST
, NF1
),
303 PAD_CFG_NF(GPD3
, UP_20K
, RSMRST
, NF1
),
305 PAD_CFG_NF(GPD4
, NONE
, RSMRST
, NF1
),
307 PAD_CFG_NF(GPD5
, NONE
, RSMRST
, NF1
),
316 /* GPD10 - SLP_S5# */
321 /* ------- GPIO Community 3 ------- */
323 /* ------- GPIO Group AZA ------- */
325 /* ------- GPIO Group CPU ------- */
327 /* ------- GPIO Community 4 ------- */
329 /* ------- GPIO Group GPP_C ------- */
331 /* GPP_C0 - SMBCLK */
332 PAD_CFG_NF(GPP_C0
, NONE
, DEEP
, NF1
),
333 /* GPP_C1 - SMBDATA */
334 PAD_CFG_NF(GPP_C1
, NONE
, DEEP
, NF1
),
336 PAD_NC(GPP_C2
, NONE
),
337 /* GPP_C3 - SML0CLK */
338 PAD_CFG_NF(GPP_C3
, NONE
, DEEP
, NF1
),
339 /* GPP_C4 - SML0DATA */
340 PAD_CFG_NF(GPP_C4
, NONE
, DEEP
, NF1
),
342 PAD_NC(GPP_C5
, NONE
),
343 /* GPP_C6 - SML1CLK */
344 PAD_CFG_NF(GPP_C6
, NONE
, DEEP
, NF1
),
345 /* GPP_C7 - SML1DATA */
346 PAD_CFG_NF(GPP_C7
, NONE
, DEEP
, NF1
),
348 PAD_NC(GPP_C8
, NONE
),
350 PAD_NC(GPP_C9
, NONE
),
352 PAD_NC(GPP_C10
, NONE
),
354 PAD_NC(GPP_C11
, NONE
),
356 PAD_NC(GPP_C12
, NONE
),
358 PAD_NC(GPP_C13
, NONE
),
360 PAD_NC(GPP_C14
, NONE
),
362 PAD_NC(GPP_C15
, NONE
),
364 PAD_NC(GPP_C16
, NONE
),
366 PAD_NC(GPP_C17
, NONE
),
368 PAD_NC(GPP_C18
, NONE
),
370 PAD_NC(GPP_C19
, NONE
),
372 PAD_NC(GPP_C20
, NONE
),
374 PAD_NC(GPP_C21
, NONE
),
376 PAD_NC(GPP_C22
, NONE
),
378 PAD_NC(GPP_C23
, NONE
),
380 /* ------- GPIO Group GPP_E ------- */
383 PAD_NC(GPP_E0
, NONE
),
385 PAD_NC(GPP_E1
, NONE
),
386 /* GPP_E2 - SATAXPCIE2 */
387 PAD_CFG_NF(GPP_E2
, UP_20K
, PLTRST
, NF1
),
389 PAD_NC(GPP_E3
, NONE
),
391 PAD_NC(GPP_E4
, NONE
),
393 PAD_NC(GPP_E5
, NONE
),
395 PAD_NC(GPP_E6
, NONE
),
397 PAD_NC(GPP_E7
, NONE
),
398 /* GPP_E8 - SATALED# */
399 PAD_CFG_NF(GPP_E8
, NONE
, PLTRST
, NF1
),
400 /* GPP_E9 - RESERVED */
401 PAD_NC(GPP_E9
, NONE
),
402 /* GPP_E10 - RESERVED */
403 PAD_NC(GPP_E10
, NONE
),
405 PAD_NC(GPP_E11
, NONE
),
407 PAD_NC(GPP_E12
, NONE
),
408 /* GPP_E13 - DDPB_HPD0 */
409 PAD_CFG_NF(GPP_E13
, NONE
, DEEP
, NF1
),
410 /* GPP_E14 - DDPC_HPD1 */
411 PAD_CFG_NF(GPP_E14
, NONE
, DEEP
, NF1
),
412 /* GPP_E15 - DDPD_HPD2 */
413 PAD_NC(GPP_E15
, NONE
),
415 PAD_NC(GPP_E16
, NONE
),
416 /* GPP_E17 - EDP_HPD */
417 PAD_CFG_NF(GPP_E17
, NONE
, DEEP
, NF1
),
418 /* GPP_E18 - DPPB_CTRLCLK */
419 PAD_CFG_NF(GPP_E18
, NONE
, DEEP
, NF1
),
420 /* GPP_E19 - DPPB_CTRLDATA */
421 PAD_CFG_NF(GPP_E19
, NONE
, DEEP
, NF1
),
422 /* GPP_E20 - DPPC_CTRLCLK */
423 PAD_NC(GPP_E20
, NONE
),
424 /* GPP_E21 - DPPC_CTRLDATA */
425 PAD_NC(GPP_E21
, NONE
),
426 /* GPP_E22 - DPPD_CTRLCLK */
427 PAD_NC(GPP_E22
, NONE
),
428 /* GPP_E23 - DPPD_CTRLDATA */
429 PAD_NC(GPP_E23
, NONE
),
431 /* ------- GPIO Group JTAG ------- */
433 /* ------- GPIO Group HVMOS ------- */
436 const struct pad_config
*board_gpio_table(size_t *num
)
438 *num
= ARRAY_SIZE(gpio_table
);
442 #endif /* CFG_GPIO_H */