mb/google/brya: Create rull variant
[coreboot2.git] / src / mainboard / protectli / vault_cml / gpio.c
blob940d3bd70ca0c36e4a745fb672e48bee3a7ace71
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #ifndef CFG_GPIO_H
4 #define CFG_GPIO_H
6 #include "gpio.h"
8 /* Pad configuration was generated automatically using intelp2m utility */
9 static const struct pad_config gpio_table[] = {
10 /* ------- GPIO Community 0 ------- */
11 /* ------- GPIO Group GPP_A ------- */
13 /* GPP_A0 - RCIN# */
14 PAD_CFG_NF(GPP_A0, NONE, DEEP, NF1),
15 /* GPP_A1 - LAD0 */
16 PAD_CFG_NF(GPP_A1, NATIVE, DEEP, NF1),
17 /* GPP_A2 - LAD1 */
18 PAD_CFG_NF(GPP_A2, NATIVE, DEEP, NF1),
19 /* GPP_A3 - LAD2 */
20 PAD_CFG_NF(GPP_A3, NATIVE, DEEP, NF1),
21 /* GPP_A4 - LAD3 */
22 PAD_CFG_NF(GPP_A4, NATIVE, DEEP, NF1),
23 /* GPP_A5 - LFRAME# */
24 PAD_CFG_NF(GPP_A5, NONE, DEEP, NF1),
25 /* GPP_A6 - SERIRQ */
26 PAD_CFG_NF(GPP_A6, NONE, DEEP, NF1),
27 /* GPP_A7 - PIRQA# */
28 PAD_CFG_NF(GPP_A7, NONE, DEEP, NF1),
29 /* GPP_A8 - CLKRUN# */
30 PAD_CFG_NF(GPP_A8, NONE, PLTRST, NF1),
31 /* GPP_A9 - CLKOUT_LPC0 */
32 PAD_CFG_NF(GPP_A9, DN_20K, DEEP, NF1),
33 /* GPP_A10 - CLKOUT_LPC1 */
34 PAD_CFG_NF(GPP_A10, DN_20K, DEEP, NF1),
35 /* GPP_A11 - PME# */
36 PAD_CFG_NF(GPP_A11, UP_20K, DEEP, NF1),
37 /* GPP_A12 - GPIO */
38 PAD_NC(GPP_A12, NONE),
39 /* GPP_A13 - GPIO */
40 PAD_NC(GPP_A13, NONE),
41 /* GPP_A14 - GPIO */
42 PAD_NC(GPP_A14, NONE),
43 /* GPP_A15 - GPIO */
44 PAD_NC(GPP_A15, NONE),
45 /* GPP_A16 - GPIO */
46 PAD_NC(GPP_A16, NONE),
47 /* GPP_A17 - GPIO */
48 PAD_NC(GPP_A17, NONE),
49 /* GPP_A18 - GPIO */
50 PAD_NC(GPP_A18, NONE),
51 /* GPP_A19 - GPIO */
52 PAD_NC(GPP_A19, NONE),
53 /* GPP_A20 - GPIO */
54 PAD_NC(GPP_A20, NONE),
55 /* GPP_A21 - GPIO */
56 PAD_NC(GPP_A21, NONE),
57 /* GPP_A22 - GPIO */
58 PAD_NC(GPP_A22, NONE),
59 /* GPP_A23 - GPIO */
60 PAD_NC(GPP_A23, NONE),
62 /* ------- GPIO Group GPP_B ------- */
64 /* GPP_B0 - CORE_VID0 */
65 PAD_NC(GPP_B0, NONE),
66 /* GPP_B1 - CORE_VID1 */
67 PAD_NC(GPP_B1, NONE),
68 /* GPP_B2 - GPIO */
69 PAD_NC(GPP_B2, NONE),
70 /* GPP_B3 - GPIO */
71 PAD_NC(GPP_B3, NONE),
72 /* GPP_B4 - GPIO */
73 PAD_NC(GPP_B4, NONE),
74 /* GPP_B5 - GPIO */
75 PAD_NC(GPP_B5, NONE),
76 /* GPP_B6 - GPIO */
77 PAD_NC(GPP_B6, NONE),
78 /* GPP_B7 - GPIO */
79 PAD_NC(GPP_B7, NONE),
80 /* GPP_B8 - GPIO */
81 PAD_NC(GPP_B8, NONE),
82 /* GPP_B9 - GPIO */
83 PAD_NC(GPP_B9, NONE),
84 /* GPP_B10 - GPIO */
85 PAD_NC(GPP_B10, NONE),
86 /* GPP_B11 - EXT_PWR_GATE# */
87 PAD_NC(GPP_B11, NONE),
88 /* GPP_B12 - SLP_S0# */
89 PAD_CFG_NF(GPP_B12, NONE, DEEP, NF1),
90 /* GPP_B13 - PLTRST# */
91 PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1),
92 /* GPP_B14 - SPKR */
93 PAD_CFG_NF(GPP_B14, DN_20K, PLTRST, NF1),
94 /* GPP_B15 - GPIO */
95 PAD_NC(GPP_B15, NONE),
96 /* GPP_B16 - GPIO */
97 PAD_NC(GPP_B16, NONE),
98 /* GPP_B17 - GPIO */
99 PAD_NC(GPP_B17, NONE),
100 /* GPP_B18 - GPIO */
101 PAD_NC(GPP_B18, NONE),
102 /* GPP_B19 - GPIO */
103 PAD_NC(GPP_B19, NONE),
104 /* GPP_B20 - GPIO */
105 PAD_NC(GPP_B20, NONE),
106 /* GPP_B21 - GPIO */
107 PAD_NC(GPP_B21, NONE),
108 /* GPP_B22 - GPIO */
109 PAD_NC(GPP_B22, NONE),
110 /* GPP_B23 - GPIO */
111 PAD_NC(GPP_B23, NONE),
113 /* ------- GPIO Group GPP_G ------- */
115 /* GPP_G0 - GPIO */
116 PAD_NC(GPP_G0, NONE),
117 /* GPP_G1 - GPIO */
118 PAD_NC(GPP_G1, NONE),
119 /* GPP_G2 - GPIO */
120 PAD_NC(GPP_G2, NONE),
121 /* GPP_G3 - GPIO */
122 PAD_NC(GPP_G3, NONE),
123 /* GPP_G4 - GPIO */
124 PAD_NC(GPP_G4, NONE),
125 /* GPP_G5 - SD3_CD# */
126 PAD_NC(GPP_G5, NONE),
127 /* GPP_G6 - GPIO */
128 PAD_NC(GPP_G6, NONE),
129 /* GPP_G7 - SD3_WP */
130 PAD_NC(GPP_G7, NONE),
132 /* ------- GPIO Group SPI ------- */
134 /* ------- GPIO Community 1 ------- */
136 /* ------- GPIO Group GPP_D ------- */
138 /* GPP_D0 - GPIO */
139 PAD_NC(GPP_D0, NONE),
140 /* GPP_D1 - GPIO */
141 PAD_NC(GPP_D1, NONE),
142 /* GPP_D2 - GPIO */
143 PAD_NC(GPP_D2, NONE),
144 /* GPP_D3 - GPIO */
145 PAD_NC(GPP_D3, NONE),
146 /* GPP_D4 - GPIO */
147 PAD_NC(GPP_D4, NONE),
148 /* GPP_D5 - GPIO */
149 PAD_NC(GPP_D5, NONE),
150 /* GPP_D6 - GPIO */
151 PAD_NC(GPP_D6, NONE),
152 /* GPP_D7 - GPIO */
153 PAD_NC(GPP_D7, NONE),
154 /* GPP_D8 - GPIO */
155 PAD_NC(GPP_D8, NONE),
156 /* GPP_D9 - GPIO */
157 PAD_NC(GPP_D9, NONE),
158 /* GPP_D10 - GPIO */
159 PAD_NC(GPP_D10, NONE),
160 /* GPP_D11 - GPIO */
161 PAD_NC(GPP_D11, NONE),
162 /* GPP_D12 - GPIO */
163 PAD_NC(GPP_D12, NONE),
164 /* GPP_D13 - GPIO */
165 PAD_NC(GPP_D13, NONE),
166 /* GPP_D14 - GPIO */
167 PAD_NC(GPP_D14, NONE),
168 /* GPP_D15 - GPIO */
169 PAD_NC(GPP_D15, NONE),
170 /* GPP_D16 - GPIO */
171 PAD_NC(GPP_D16, NONE),
172 /* GPP_D17 - GPIO */
173 PAD_NC(GPP_D17, NONE),
174 /* GPP_D18 - GPIO */
175 PAD_NC(GPP_D18, NONE),
176 /* GPP_D19 - GPIO */
177 PAD_NC(GPP_D19, NONE),
178 /* GPP_D20 - GPIO */
179 PAD_NC(GPP_D20, NONE),
180 /* GPP_D21 - SPI1_IO2 */
181 PAD_NC(GPP_D21, NONE),
182 /* GPP_D22 - SPI1_IO3 */
183 PAD_NC(GPP_D22, NONE),
184 /* GPP_D23 - GPIO */
185 PAD_NC(GPP_D23, NONE),
187 /* ------- GPIO Group GPP_F ------- */
189 /* GPP_F0 - GPIO */
190 PAD_NC(GPP_F0, NONE),
191 /* GPP_F1 - GPIO */
192 PAD_NC(GPP_F1, NONE),
193 /* GPP_F2 - GPIO */
194 PAD_NC(GPP_F2, NONE),
195 /* GPP_F3 - GPIO */
196 PAD_NC(GPP_F3, NONE),
197 /* GPP_F4 - GPIO */
198 PAD_NC(GPP_F4, NONE),
199 /* GPP_F5 - GPIO */
200 PAD_NC(GPP_F5, NONE),
201 /* GPP_F6 - GPIO */
202 PAD_NC(GPP_F6, NONE),
203 /* GPP_F7 - GPIO */
204 PAD_NC(GPP_F7, NONE),
205 /* GPP_F8 - GPIO */
206 PAD_NC(GPP_F8, NONE),
207 /* GPP_F9 - GPIO */
208 PAD_NC(GPP_F9, NONE),
209 /* GPP_F10 - GPIO */
210 PAD_NC(GPP_F10, NONE),
211 /* GPP_F11 - EMMC_CMD */
212 PAD_CFG_NF(GPP_F11, NONE, DEEP, NF1),
213 /* GPP_F12 - EMMC_DATA0 */
214 PAD_CFG_NF(GPP_F12, NONE, DEEP, NF1),
215 /* GPP_F13 - EMMC_DATA1 */
216 PAD_CFG_NF(GPP_F13, NONE, DEEP, NF1),
217 /* GPP_F14 - EMMC_DATA2 */
218 PAD_CFG_NF(GPP_F14, NONE, DEEP, NF1),
219 /* GPP_F15 - EMMC_DATA3 */
220 PAD_CFG_NF(GPP_F15, NONE, DEEP, NF1),
221 /* GPP_F16 - EMMC_DATA4 */
222 PAD_CFG_NF(GPP_F16, NONE, DEEP, NF1),
223 /* GPP_F17 - EMMC_DATA5 */
224 PAD_CFG_NF(GPP_F17, NONE, DEEP, NF1),
225 /* GPP_F18 - EMMC_DATA6 */
226 PAD_CFG_NF(GPP_F18, NONE, DEEP, NF1),
227 /* GPP_F19 - EMMC_DATA7 */
228 PAD_CFG_NF(GPP_F19, NONE, DEEP, NF1),
229 /* GPP_F20 - EMMC_RCLK */
230 PAD_CFG_NF(GPP_F20, NONE, DEEP, NF1),
231 /* GPP_F21 - EMMC_CLK */
232 PAD_CFG_NF(GPP_F21, NONE, DEEP, NF1),
233 /* GPP_F22 - EMMC_RESET# */
234 PAD_CFG_NF(GPP_F22, NONE, DEEP, NF1),
235 /* GPP_F23 - GPIO */
236 PAD_NC(GPP_F23, NONE),
238 /* ------- GPIO Group GPP_H ------- */
240 /* GPP_H0 - GPIO */
241 PAD_NC(GPP_H0, NONE),
242 /* GPP_H1 - GPIO# */
243 PAD_NC(GPP_H1, NONE),
244 /* GPP_H2 - GPIO */
245 PAD_NC(GPP_H2, NONE),
246 /* GPP_H3 - GPIO */
247 PAD_NC(GPP_H3, NONE),
248 /* GPP_H4 - GPIO */
249 PAD_NC(GPP_H4, NONE),
250 /* GPP_H5 - GPIO */
251 PAD_NC(GPP_H5, NONE),
252 /* GPP_H6 - GPIO */
253 PAD_NC(GPP_H6, NONE),
254 /* GPP_H7 - GPIO */
255 PAD_NC(GPP_H7, NONE),
256 /* GPP_H8 - GPIO */
257 PAD_NC(GPP_H8, NONE),
258 /* GPP_H9 - GPIO */
259 PAD_NC(GPP_H9, NONE),
260 /* GPP_H10 - GPIO */
261 PAD_NC(GPP_H10, NONE),
262 /* GPP_H11 - GPIO */
263 PAD_NC(GPP_H11, NONE),
264 /* GPP_H12 - GPIO */
265 PAD_NC(GPP_H12, NONE),
266 /* GPP_H13 - GPIO */
267 PAD_NC(GPP_H13, NONE),
268 /* GPP_H14 - GPIO */
269 PAD_NC(GPP_H14, NONE),
270 /* GPP_H15 - GPIO */
271 PAD_NC(GPP_H15, NONE),
272 /* GPP_H16 - GPIO */
273 PAD_NC(GPP_H16, NONE),
274 /* GPP_H17 - GPIO */
275 PAD_NC(GPP_H17, NONE),
276 /* GPP_H18 - CPU_C10_GATE# */
277 PAD_CFG_NF(GPP_H18, NONE, DEEP, NF1),
278 /* GPP_H19 - GPIO */
279 PAD_NC(GPP_H19, NONE),
280 /* GPP_H20 - GPIO */
281 PAD_NC(GPP_H20, NONE),
282 /* GPP_H21 - GPIO */
283 PAD_NC(GPP_H21, NONE),
284 /* GPP_H22 - GPIO */
285 PAD_NC(GPP_H22, NONE),
286 /* GPP_H23 - GPIO */
287 PAD_NC(GPP_H23, NONE),
289 /* ------- GPIO Group VGPIO ------- */
291 /* ------- GPIO Community 2 ------- */
293 /* ------- GPIO Group GPD ------- */
295 /* GPD0 - BATLOW# */
296 PAD_CFG_NF(GPD0, NONE, RSMRST, NF1),
297 /* GPD1 - ACPRESENT */
298 PAD_CFG_NF(GPD1, NATIVE, RSMRST, NF1),
299 /* GPD2 - LAN_WAKE# */
300 PAD_CFG_NF(GPD2, NATIVE, RSMRST, NF1),
301 /* GPD3 - PRWBTN# */
302 PAD_CFG_NF(GPD3, UP_20K, RSMRST, NF1),
303 /* GPD4 - SLP_S3# */
304 PAD_CFG_NF(GPD4, NONE, RSMRST, NF1),
305 /* GPD5 - SLP_S4# */
306 PAD_CFG_NF(GPD5, NONE, RSMRST, NF1),
307 /* GPD6 - SLP_A# */
308 PAD_NC(GPD6, NONE),
309 /* GPD7 - GPIO */
310 PAD_NC(GPD7, NONE),
311 /* GPD8 - SUSCLK */
312 PAD_NC(GPD8, NONE),
313 /* GPD9 - GPIO */
314 PAD_NC(GPD9, NONE),
315 /* GPD10 - SLP_S5# */
316 PAD_NC(GPD10, NONE),
317 /* GPD11 - GPIO */
318 PAD_NC(GPD11, NONE),
320 /* ------- GPIO Community 3 ------- */
322 /* ------- GPIO Group AZA ------- */
324 /* ------- GPIO Group CPU ------- */
326 /* ------- GPIO Community 4 ------- */
328 /* ------- GPIO Group GPP_C ------- */
330 /* GPP_C0 - SMBCLK */
331 PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1),
332 /* GPP_C1 - SMBDATA */
333 PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1),
334 /* GPP_C2 - GPIO */
335 PAD_NC(GPP_C2, NONE),
336 /* GPP_C3 - SML0CLK */
337 PAD_CFG_NF(GPP_C3, NONE, DEEP, NF1),
338 /* GPP_C4 - SML0DATA */
339 PAD_CFG_NF(GPP_C4, NONE, DEEP, NF1),
340 /* GPP_C5 - GPIO */
341 PAD_NC(GPP_C5, NONE),
342 /* GPP_C6 - SML1CLK */
343 PAD_CFG_NF(GPP_C6, NONE, DEEP, NF1),
344 /* GPP_C7 - SML1DATA */
345 PAD_CFG_NF(GPP_C7, NONE, DEEP, NF1),
346 /* GPP_C8 - GPIO */
347 PAD_NC(GPP_C8, NONE),
348 /* GPP_C9 - GPIO */
349 PAD_NC(GPP_C9, NONE),
350 /* GPP_C10 - GPIO */
351 PAD_NC(GPP_C10, NONE),
352 /* GPP_C11 - GPIO */
353 PAD_NC(GPP_C11, NONE),
354 /* GPP_C12 - GPIO */
355 PAD_NC(GPP_C12, NONE),
356 /* GPP_C13 - GPIO */
357 PAD_NC(GPP_C13, NONE),
358 /* GPP_C14 - GPIO */
359 PAD_NC(GPP_C14, NONE),
360 /* GPP_C15 - GPIO */
361 PAD_NC(GPP_C15, NONE),
362 /* GPP_C16 - GPIO */
363 PAD_NC(GPP_C16, NONE),
364 /* GPP_C17 - GPIO */
365 PAD_NC(GPP_C17, NONE),
366 /* GPP_C18 - GPIO */
367 PAD_NC(GPP_C18, NONE),
368 /* GPP_C19 - GPIO */
369 PAD_NC(GPP_C19, NONE),
370 /* GPP_C20 - GPIO */
371 PAD_NC(GPP_C20, NONE),
372 /* GPP_C21 - GPIO */
373 PAD_NC(GPP_C21, NONE),
374 /* GPP_C22 - GPIO */
375 PAD_NC(GPP_C22, NONE),
376 /* GPP_C23 - GPIO */
377 PAD_NC(GPP_C23, NONE),
379 /* ------- GPIO Group GPP_E ------- */
381 /* GPP_E0 - GPIO */
382 PAD_NC(GPP_E0, NONE),
383 /* GPP_E1 - GPIO */
384 PAD_NC(GPP_E1, NONE),
385 /* GPP_E2 - SATAXPCIE2 */
386 PAD_CFG_NF(GPP_E2, UP_20K, PLTRST, NF1),
387 /* GPP_E3 - GPIO */
388 PAD_NC(GPP_E3, NONE),
389 /* GPP_E4 - GPIO */
390 PAD_NC(GPP_E4, NONE),
391 /* GPP_E5 - GPIO */
392 PAD_NC(GPP_E5, NONE),
393 /* GPP_E6 - GPIO */
394 PAD_NC(GPP_E6, NONE),
395 /* GPP_E7 - GPIO */
396 PAD_NC(GPP_E7, NONE),
397 /* GPP_E8 - SATALED# */
398 PAD_CFG_NF(GPP_E8, NONE, PLTRST, NF1),
399 /* GPP_E9 - RESERVED */
400 PAD_NC(GPP_E9, NONE),
401 /* GPP_E10 - RESERVED */
402 PAD_NC(GPP_E10, NONE),
403 /* GPP_E11 - GPIO */
404 PAD_NC(GPP_E11, NONE),
405 /* GPP_E12 - GPIO */
406 PAD_NC(GPP_E12, NONE),
407 /* GPP_E13 - DDPB_HPD0 */
408 PAD_CFG_NF(GPP_E13, NONE, DEEP, NF1),
409 /* GPP_E14 - DDPC_HPD1 */
410 PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1),
411 /* GPP_E15 - DDPD_HPD2 */
412 PAD_NC(GPP_E15, NONE),
413 /* GPP_E16 - GPIO */
414 PAD_NC(GPP_E16, NONE),
415 /* GPP_E17 - EDP_HPD */
416 PAD_CFG_NF(GPP_E17, NONE, DEEP, NF1),
417 /* GPP_E18 - DPPB_CTRLCLK */
418 PAD_CFG_NF(GPP_E18, NONE, DEEP, NF1),
419 /* GPP_E19 - DPPB_CTRLDATA */
420 PAD_CFG_NF(GPP_E19, NONE, DEEP, NF1),
421 /* GPP_E20 - DPPC_CTRLCLK */
422 PAD_NC(GPP_E20, NONE),
423 /* GPP_E21 - DPPC_CTRLDATA */
424 PAD_NC(GPP_E21, NONE),
425 /* GPP_E22 - DPPD_CTRLCLK */
426 PAD_NC(GPP_E22, NONE),
427 /* GPP_E23 - DPPD_CTRLDATA */
428 PAD_NC(GPP_E23, NONE),
430 /* ------- GPIO Group JTAG ------- */
432 /* ------- GPIO Group HVMOS ------- */
435 const struct pad_config *board_gpio_table(size_t *num)
437 *num = ARRAY_SIZE(gpio_table);
438 return gpio_table;
441 #endif /* CFG_GPIO_H */