mb/google/nissa/var/rull: add ssd timing and modify ssd GPIO pins of rtd3
[coreboot2.git] / src / northbridge / intel / sandybridge / registers / 
treec59cbdfa79336e594a9bc55c544ac55ff0034c59
drwxr-xr-x   ..
-rw-r--r-- 1434 dmibar.h
-rw-r--r-- 639 epbar.h
-rw-r--r-- 1813 host_bridge.h
-rw-r--r-- 25199 mchbar.h