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Linux 3.11-rc3
[cris-mirror.git] / drivers / tty / serial / m32r_sio.c
blobbb1afa0922e1ac1a2fe7664240a2df2fc71b1b53
1 /*
2 * m32r_sio.c
3 *
4 * Driver for M32R serial ports
5 *
6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
7 * Based on drivers/serial/8250.c.
8 *
9 * Copyright (C) 2001 Russell King.
10 * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org>
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 */
17
18 /*
19 * A note about mapbase / membase
20 *
21 * mapbase is the physical address of the IO port. Currently, we don't
22 * support this very well, and it may well be dropped from this driver
23 * in future. As such, mapbase should be NULL.
24 *
25 * membase is an 'ioremapped' cookie. This is compatible with the old
26 * serial.c driver, and is currently the preferred form.
27 */
28
29 #if defined(CONFIG_SERIAL_M32R_SIO_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
30 #define SUPPORT_SYSRQ
31 #endif
32
33 #include <linux/module.h>
34 #include <linux/tty.h>
35 #include <linux/tty_flip.h>
36 #include <linux/ioport.h>
37 #include <linux/init.h>
38 #include <linux/console.h>
39 #include <linux/sysrq.h>
40 #include <linux/serial.h>
41 #include <linux/delay.h>
42
43 #include <asm/m32r.h>
44 #include <asm/io.h>
45 #include <asm/irq.h>
46
47 #define BAUD_RATE 115200
48
49 #include <linux/serial_core.h>
50 #include "m32r_sio.h"
51 #include "m32r_sio_reg.h"
52
53 /*
54 * Debugging.
55 */
56 #if 0
57 #define DEBUG_AUTOCONF(fmt...) printk(fmt)
58 #else
59 #define DEBUG_AUTOCONF(fmt...) do { } while (0)
60 #endif
61
62 #if 0
63 #define DEBUG_INTR(fmt...) printk(fmt)
64 #else
65 #define DEBUG_INTR(fmt...) do { } while (0)
66 #endif
67
68 #define PASS_LIMIT 256
69
70 #define BASE_BAUD 115200
71
72 /* Standard COM flags */
73 #define STD_COM_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST)
74
75 /*
76 * SERIAL_PORT_DFNS tells us about built-in ports that have no
77 * standard enumeration mechanism. Platforms that can find all
78 * serial ports via mechanisms like ACPI or PCI need not supply it.
79 */
80 #if defined(CONFIG_PLAT_USRV)
81
82 #define SERIAL_PORT_DFNS \
83 /* UART CLK PORT IRQ FLAGS */ \
84 { 0, BASE_BAUD, 0x3F8, PLD_IRQ_UART0, STD_COM_FLAGS }, /* ttyS0 */ \
85 { 0, BASE_BAUD, 0x2F8, PLD_IRQ_UART1, STD_COM_FLAGS }, /* ttyS1 */
86
87 #else /* !CONFIG_PLAT_USRV */
88
89 #if defined(CONFIG_SERIAL_M32R_PLDSIO)
90 #define SERIAL_PORT_DFNS \
91 { 0, BASE_BAUD, ((unsigned long)PLD_ESIO0CR), PLD_IRQ_SIO0_RCV, \
92 STD_COM_FLAGS }, /* ttyS0 */
93 #else
94 #define SERIAL_PORT_DFNS \
95 { 0, BASE_BAUD, M32R_SIO_OFFSET, M32R_IRQ_SIO0_R, \
96 STD_COM_FLAGS }, /* ttyS0 */
97 #endif
98
99 #endif /* !CONFIG_PLAT_USRV */
100
101 static struct old_serial_port old_serial_port[] = {
102 SERIAL_PORT_DFNS
103 };
104
105 #define UART_NR ARRAY_SIZE(old_serial_port)
106
107 struct uart_sio_port {
108 struct uart_port port;
109 struct timer_list timer; /* "no irq" timer */
110 struct list_head list; /* ports on this IRQ */
111 unsigned short rev;
112 unsigned char acr;
113 unsigned char ier;
114 unsigned char lcr;
115 unsigned char mcr_mask; /* mask of user bits */
116 unsigned char mcr_force; /* mask of forced bits */
117 unsigned char lsr_break_flag;
118
119 /*
120 * We provide a per-port pm hook.
121 */
122 void (*pm)(struct uart_port *port,
123 unsigned int state, unsigned int old);
124 };
125
126 struct irq_info {
127 spinlock_t lock;
128 struct list_head *head;
129 };
130
131 static struct irq_info irq_lists[NR_IRQS];
132
133 #ifdef CONFIG_SERIAL_M32R_PLDSIO
134
135 #define __sio_in(x) inw((unsigned long)(x))
136 #define __sio_out(v,x) outw((v),(unsigned long)(x))
137
138 static inline void sio_set_baud_rate(unsigned long baud)
139 {
140 unsigned short sbaud;
141 sbaud = (boot_cpu_data.bus_clock / (baud * 4))-1;
142 __sio_out(sbaud, PLD_ESIO0BAUR);
143 }
144
145 static void sio_reset(void)
146 {
147 unsigned short tmp;
148
149 tmp = __sio_in(PLD_ESIO0RXB);
150 tmp = __sio_in(PLD_ESIO0RXB);
151 tmp = __sio_in(PLD_ESIO0CR);
152 sio_set_baud_rate(BAUD_RATE);
153 __sio_out(0x0300, PLD_ESIO0CR);
154 __sio_out(0x0003, PLD_ESIO0CR);
155 }
156
157 static void sio_init(void)
158 {
159 unsigned short tmp;
160
161 tmp = __sio_in(PLD_ESIO0RXB);
162 tmp = __sio_in(PLD_ESIO0RXB);
163 tmp = __sio_in(PLD_ESIO0CR);
164 __sio_out(0x0300, PLD_ESIO0CR);
165 __sio_out(0x0003, PLD_ESIO0CR);
166 }
167
168 static void sio_error(int *status)
169 {
170 printk("SIO0 error[%04x]\n", *status);
171 do {
172 sio_init();
173 } while ((*status = __sio_in(PLD_ESIO0CR)) != 3);
174 }
175
176 #else /* not CONFIG_SERIAL_M32R_PLDSIO */
177
178 #define __sio_in(x) inl(x)
179 #define __sio_out(v,x) outl((v),(x))
180
181 static inline void sio_set_baud_rate(unsigned long baud)
182 {
183 unsigned long i, j;
184
185 i = boot_cpu_data.bus_clock / (baud * 16);
186 j = (boot_cpu_data.bus_clock - (i * baud * 16)) / baud;
187 i -= 1;
188 j = (j + 1) >> 1;
189
190 __sio_out(i, M32R_SIO0_BAUR_PORTL);
191 __sio_out(j, M32R_SIO0_RBAUR_PORTL);
192 }
193
194 static void sio_reset(void)
195 {
196 __sio_out(0x00000300, M32R_SIO0_CR_PORTL); /* init status */
197 __sio_out(0x00000800, M32R_SIO0_MOD1_PORTL); /* 8bit */
198 __sio_out(0x00000080, M32R_SIO0_MOD0_PORTL); /* 1stop non */
199 sio_set_baud_rate(BAUD_RATE);
200 __sio_out(0x00000000, M32R_SIO0_TRCR_PORTL);
201 __sio_out(0x00000003, M32R_SIO0_CR_PORTL); /* RXCEN */
202 }
203
204 static void sio_init(void)
205 {
206 unsigned int tmp;
207
208 tmp = __sio_in(M32R_SIO0_RXB_PORTL);
209 tmp = __sio_in(M32R_SIO0_RXB_PORTL);
210 tmp = __sio_in(M32R_SIO0_STS_PORTL);
211 __sio_out(0x00000003, M32R_SIO0_CR_PORTL);
212 }
213
214 static void sio_error(int *status)
215 {
216 printk("SIO0 error[%04x]\n", *status);
217 do {
218 sio_init();
219 } while ((*status = __sio_in(M32R_SIO0_CR_PORTL)) != 3);
220 }
221
222 #endif /* CONFIG_SERIAL_M32R_PLDSIO */
223
224 static unsigned int sio_in(struct uart_sio_port *up, int offset)
225 {
226 return __sio_in(up->port.iobase + offset);
227 }
228
229 static void sio_out(struct uart_sio_port *up, int offset, int value)
230 {
231 __sio_out(value, up->port.iobase + offset);
232 }
233
234 static unsigned int serial_in(struct uart_sio_port *up, int offset)
235 {
236 if (!offset)
237 return 0;
238
239 return __sio_in(offset);
240 }
241
242 static void serial_out(struct uart_sio_port *up, int offset, int value)
243 {
244 if (!offset)
245 return;
246
247 __sio_out(value, offset);
248 }
249
250 static void m32r_sio_stop_tx(struct uart_port *port)
251 {
252 struct uart_sio_port *up = (struct uart_sio_port *)port;
253
254 if (up->ier & UART_IER_THRI) {
255 up->ier &= ~UART_IER_THRI;
256 serial_out(up, UART_IER, up->ier);
257 }
258 }
259
260 static void m32r_sio_start_tx(struct uart_port *port)
261 {
262 #ifdef CONFIG_SERIAL_M32R_PLDSIO
263 struct uart_sio_port *up = (struct uart_sio_port *)port;
264 struct circ_buf *xmit = &up->port.state->xmit;
265
266 if (!(up->ier & UART_IER_THRI)) {
267 up->ier |= UART_IER_THRI;
268 serial_out(up, UART_IER, up->ier);
269 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
270 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
271 up->port.icount.tx++;
272 }
273 while((serial_in(up, UART_LSR) & UART_EMPTY) != UART_EMPTY);
274 #else
275 struct uart_sio_port *up = (struct uart_sio_port *)port;
276
277 if (!(up->ier & UART_IER_THRI)) {
278 up->ier |= UART_IER_THRI;
279 serial_out(up, UART_IER, up->ier);
280 }
281 #endif
282 }
283
284 static void m32r_sio_stop_rx(struct uart_port *port)
285 {
286 struct uart_sio_port *up = (struct uart_sio_port *)port;
287
288 up->ier &= ~UART_IER_RLSI;
289 up->port.read_status_mask &= ~UART_LSR_DR;
290 serial_out(up, UART_IER, up->ier);
291 }
292
293 static void m32r_sio_enable_ms(struct uart_port *port)
294 {
295 struct uart_sio_port *up = (struct uart_sio_port *)port;
296
297 up->ier |= UART_IER_MSI;
298 serial_out(up, UART_IER, up->ier);
299 }
300
301 static void receive_chars(struct uart_sio_port *up, int *status)
302 {
303 struct tty_port *port = &up->port.state->port;
304 unsigned char ch;
305 unsigned char flag;
306 int max_count = 256;
307
308 do {
309 ch = sio_in(up, SIORXB);
310 flag = TTY_NORMAL;
311 up->port.icount.rx++;
312
313 if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
314 UART_LSR_FE | UART_LSR_OE))) {
315 /*
316 * For statistics only
317 */
318 if (*status & UART_LSR_BI) {
319 *status &= ~(UART_LSR_FE | UART_LSR_PE);
320 up->port.icount.brk++;
321 /*
322 * We do the SysRQ and SAK checking
323 * here because otherwise the break
324 * may get masked by ignore_status_mask
325 * or read_status_mask.
326 */
327 if (uart_handle_break(&up->port))
328 goto ignore_char;
329 } else if (*status & UART_LSR_PE)
330 up->port.icount.parity++;
331 else if (*status & UART_LSR_FE)
332 up->port.icount.frame++;
333 if (*status & UART_LSR_OE)
334 up->port.icount.overrun++;
335
336 /*
337 * Mask off conditions which should be ingored.
338 */
339 *status &= up->port.read_status_mask;
340
341 if (up->port.line == up->port.cons->index) {
342 /* Recover the break flag from console xmit */
343 *status |= up->lsr_break_flag;
344 up->lsr_break_flag = 0;
345 }
346
347 if (*status & UART_LSR_BI) {
348 DEBUG_INTR("handling break....");
349 flag = TTY_BREAK;
350 } else if (*status & UART_LSR_PE)
351 flag = TTY_PARITY;
352 else if (*status & UART_LSR_FE)
353 flag = TTY_FRAME;
354 }
355 if (uart_handle_sysrq_char(&up->port, ch))
356 goto ignore_char;
357 if ((*status & up->port.ignore_status_mask) == 0)
358 tty_insert_flip_char(port, ch, flag);
359
360 if (*status & UART_LSR_OE) {
361 /*
362 * Overrun is special, since it's reported
363 * immediately, and doesn't affect the current
364 * character.
365 */
366 tty_insert_flip_char(port, 0, TTY_OVERRUN);
367 }
368 ignore_char:
369 *status = serial_in(up, UART_LSR);
370 } while ((*status & UART_LSR_DR) && (max_count-- > 0));
371 tty_flip_buffer_push(port);
372 }
373
374 static void transmit_chars(struct uart_sio_port *up)
375 {
376 struct circ_buf *xmit = &up->port.state->xmit;
377 int count;
378
379 if (up->port.x_char) {
380 #ifndef CONFIG_SERIAL_M32R_PLDSIO /* XXX */
381 serial_out(up, UART_TX, up->port.x_char);
382 #endif
383 up->port.icount.tx++;
384 up->port.x_char = 0;
385 return;
386 }
387 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
388 m32r_sio_stop_tx(&up->port);
389 return;
390 }
391
392 count = up->port.fifosize;
393 do {
394 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
395 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
396 up->port.icount.tx++;
397 if (uart_circ_empty(xmit))
398 break;
399 while (!(serial_in(up, UART_LSR) & UART_LSR_THRE));
400
401 } while (--count > 0);
402
403 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
404 uart_write_wakeup(&up->port);
405
406 DEBUG_INTR("THRE...");
407
408 if (uart_circ_empty(xmit))
409 m32r_sio_stop_tx(&up->port);
410 }
411
412 /*
413 * This handles the interrupt from one port.
414 */
415 static inline void m32r_sio_handle_port(struct uart_sio_port *up,
416 unsigned int status)
417 {
418 DEBUG_INTR("status = %x...", status);
419
420 if (status & 0x04)
421 receive_chars(up, &status);
422 if (status & 0x01)
423 transmit_chars(up);
424 }
425
426 /*
427 * This is the serial driver's interrupt routine.
428 *
429 * Arjan thinks the old way was overly complex, so it got simplified.
430 * Alan disagrees, saying that need the complexity to handle the weird
431 * nature of ISA shared interrupts. (This is a special exception.)
432 *
433 * In order to handle ISA shared interrupts properly, we need to check
434 * that all ports have been serviced, and therefore the ISA interrupt
435 * line has been de-asserted.
436 *
437 * This means we need to loop through all ports. checking that they
438 * don't have an interrupt pending.
439 */
440 static irqreturn_t m32r_sio_interrupt(int irq, void *dev_id)
441 {
442 struct irq_info *i = dev_id;
443 struct list_head *l, *end = NULL;
444 int pass_counter = 0;
445
446 DEBUG_INTR("m32r_sio_interrupt(%d)...", irq);
447
448 #ifdef CONFIG_SERIAL_M32R_PLDSIO
449 // if (irq == PLD_IRQ_SIO0_SND)
450 // irq = PLD_IRQ_SIO0_RCV;
451 #else
452 if (irq == M32R_IRQ_SIO0_S)
453 irq = M32R_IRQ_SIO0_R;
454 #endif
455
456 spin_lock(&i->lock);
457
458 l = i->head;
459 do {
460 struct uart_sio_port *up;
461 unsigned int sts;
462
463 up = list_entry(l, struct uart_sio_port, list);
464
465 sts = sio_in(up, SIOSTS);
466 if (sts & 0x5) {
467 spin_lock(&up->port.lock);
468 m32r_sio_handle_port(up, sts);
469 spin_unlock(&up->port.lock);
470
471 end = NULL;
472 } else if (end == NULL)
473 end = l;
474
475 l = l->next;
476
477 if (l == i->head && pass_counter++ > PASS_LIMIT) {
478 if (sts & 0xe0)
479 sio_error(&sts);
480 break;
481 }
482 } while (l != end);
483
484 spin_unlock(&i->lock);
485
486 DEBUG_INTR("end.\n");
487
488 return IRQ_HANDLED;
489 }
490
491 /*
492 * To support ISA shared interrupts, we need to have one interrupt
493 * handler that ensures that the IRQ line has been deasserted
494 * before returning. Failing to do this will result in the IRQ
495 * line being stuck active, and, since ISA irqs are edge triggered,
496 * no more IRQs will be seen.
497 */
498 static void serial_do_unlink(struct irq_info *i, struct uart_sio_port *up)
499 {
500 spin_lock_irq(&i->lock);
501
502 if (!list_empty(i->head)) {
503 if (i->head == &up->list)
504 i->head = i->head->next;
505 list_del(&up->list);
506 } else {
507 BUG_ON(i->head != &up->list);
508 i->head = NULL;
509 }
510
511 spin_unlock_irq(&i->lock);
512 }
513
514 static int serial_link_irq_chain(struct uart_sio_port *up)
515 {
516 struct irq_info *i = irq_lists + up->port.irq;
517 int ret, irq_flags = 0;
518
519 spin_lock_irq(&i->lock);
520
521 if (i->head) {
522 list_add(&up->list, i->head);
523 spin_unlock_irq(&i->lock);
524
525 ret = 0;
526 } else {
527 INIT_LIST_HEAD(&up->list);
528 i->head = &up->list;
529 spin_unlock_irq(&i->lock);
530
531 ret = request_irq(up->port.irq, m32r_sio_interrupt,
532 irq_flags, "SIO0-RX", i);
533 ret |= request_irq(up->port.irq + 1, m32r_sio_interrupt,
534 irq_flags, "SIO0-TX", i);
535 if (ret < 0)
536 serial_do_unlink(i, up);
537 }
538
539 return ret;
540 }
541
542 static void serial_unlink_irq_chain(struct uart_sio_port *up)
543 {
544 struct irq_info *i = irq_lists + up->port.irq;
545
546 BUG_ON(i->head == NULL);
547
548 if (list_empty(i->head)) {
549 free_irq(up->port.irq, i);
550 free_irq(up->port.irq + 1, i);
551 }
552
553 serial_do_unlink(i, up);
554 }
555
556 /*
557 * This function is used to handle ports that do not have an interrupt.
558 */
559 static void m32r_sio_timeout(unsigned long data)
560 {
561 struct uart_sio_port *up = (struct uart_sio_port *)data;
562 unsigned int timeout;
563 unsigned int sts;
564
565 sts = sio_in(up, SIOSTS);
566 if (sts & 0x5) {
567 spin_lock(&up->port.lock);
568 m32r_sio_handle_port(up, sts);
569 spin_unlock(&up->port.lock);
570 }
571
572 timeout = up->port.timeout;
573 timeout = timeout > 6 ? (timeout / 2 - 2) : 1;
574 mod_timer(&up->timer, jiffies + timeout);
575 }
576
577 static unsigned int m32r_sio_tx_empty(struct uart_port *port)
578 {
579 struct uart_sio_port *up = (struct uart_sio_port *)port;
580 unsigned long flags;
581 unsigned int ret;
582
583 spin_lock_irqsave(&up->port.lock, flags);
584 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
585 spin_unlock_irqrestore(&up->port.lock, flags);
586
587 return ret;
588 }
589
590 static unsigned int m32r_sio_get_mctrl(struct uart_port *port)
591 {
592 return 0;
593 }
594
595 static void m32r_sio_set_mctrl(struct uart_port *port, unsigned int mctrl)
596 {
597
598 }
599
600 static void m32r_sio_break_ctl(struct uart_port *port, int break_state)
601 {
602
603 }
604
605 static int m32r_sio_startup(struct uart_port *port)
606 {
607 struct uart_sio_port *up = (struct uart_sio_port *)port;
608 int retval;
609
610 sio_init();
611
612 /*
613 * If the "interrupt" for this port doesn't correspond with any
614 * hardware interrupt, we use a timer-based system. The original
615 * driver used to do this with IRQ0.
616 */
617 if (!up->port.irq) {
618 unsigned int timeout = up->port.timeout;
619
620 timeout = timeout > 6 ? (timeout / 2 - 2) : 1;
621
622 up->timer.data = (unsigned long)up;
623 mod_timer(&up->timer, jiffies + timeout);
624 } else {
625 retval = serial_link_irq_chain(up);
626 if (retval)
627 return retval;
628 }
629
630 /*
631 * Finally, enable interrupts. Note: Modem status interrupts
632 * are set via set_termios(), which will be occurring imminently
633 * anyway, so we don't enable them here.
634 * - M32R_SIO: 0x0c
635 * - M32R_PLDSIO: 0x04
636 */
637 up->ier = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
638 sio_out(up, SIOTRCR, up->ier);
639
640 /*
641 * And clear the interrupt registers again for luck.
642 */
643 sio_reset();
644
645 return 0;
646 }
647
648 static void m32r_sio_shutdown(struct uart_port *port)
649 {
650 struct uart_sio_port *up = (struct uart_sio_port *)port;
651
652 /*
653 * Disable interrupts from this port
654 */
655 up->ier = 0;
656 sio_out(up, SIOTRCR, 0);
657
658 /*
659 * Disable break condition and FIFOs
660 */
661
662 sio_init();
663
664 if (!up->port.irq)
665 del_timer_sync(&up->timer);
666 else
667 serial_unlink_irq_chain(up);
668 }
669
670 static unsigned int m32r_sio_get_divisor(struct uart_port *port,
671 unsigned int baud)
672 {
673 return uart_get_divisor(port, baud);
674 }
675
676 static void m32r_sio_set_termios(struct uart_port *port,
677 struct ktermios *termios, struct ktermios *old)
678 {
679 struct uart_sio_port *up = (struct uart_sio_port *)port;
680 unsigned char cval = 0;
681 unsigned long flags;
682 unsigned int baud, quot;
683
684 switch (termios->c_cflag & CSIZE) {
685 case CS5:
686 cval = UART_LCR_WLEN5;
687 break;
688 case CS6:
689 cval = UART_LCR_WLEN6;
690 break;
691 case CS7:
692 cval = UART_LCR_WLEN7;
693 break;
694 default:
695 case CS8:
696 cval = UART_LCR_WLEN8;
697 break;
698 }
699
700 if (termios->c_cflag & CSTOPB)
701 cval |= UART_LCR_STOP;
702 if (termios->c_cflag & PARENB)
703 cval |= UART_LCR_PARITY;
704 if (!(termios->c_cflag & PARODD))
705 cval |= UART_LCR_EPAR;
706 #ifdef CMSPAR
707 if (termios->c_cflag & CMSPAR)
708 cval |= UART_LCR_SPAR;
709 #endif
710
711 /*
712 * Ask the core to calculate the divisor for us.
713 */
714 #ifdef CONFIG_SERIAL_M32R_PLDSIO
715 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/4);
716 #else
717 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
718 #endif
719 quot = m32r_sio_get_divisor(port, baud);
720
721 /*
722 * Ok, we're now changing the port state. Do it with
723 * interrupts disabled.
724 */
725 spin_lock_irqsave(&up->port.lock, flags);
726
727 sio_set_baud_rate(baud);
728
729 /*
730 * Update the per-port timeout.
731 */
732 uart_update_timeout(port, termios->c_cflag, baud);
733
734 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
735 if (termios->c_iflag & INPCK)
736 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
737 if (termios->c_iflag & (BRKINT | PARMRK))
738 up->port.read_status_mask |= UART_LSR_BI;
739
740 /*
741 * Characteres to ignore
742 */
743 up->port.ignore_status_mask = 0;
744 if (termios->c_iflag & IGNPAR)
745 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
746 if (termios->c_iflag & IGNBRK) {
747 up->port.ignore_status_mask |= UART_LSR_BI;
748 /*
749 * If we're ignoring parity and break indicators,
750 * ignore overruns too (for real raw support).
751 */
752 if (termios->c_iflag & IGNPAR)
753 up->port.ignore_status_mask |= UART_LSR_OE;
754 }
755
756 /*
757 * ignore all characters if CREAD is not set
758 */
759 if ((termios->c_cflag & CREAD) == 0)
760 up->port.ignore_status_mask |= UART_LSR_DR;
761
762 /*
763 * CTS flow control flag and modem status interrupts
764 */
765 up->ier &= ~UART_IER_MSI;
766 if (UART_ENABLE_MS(&up->port, termios->c_cflag))
767 up->ier |= UART_IER_MSI;
768
769 serial_out(up, UART_IER, up->ier);
770
771 up->lcr = cval; /* Save LCR */
772 spin_unlock_irqrestore(&up->port.lock, flags);
773 }
774
775 static void m32r_sio_pm(struct uart_port *port, unsigned int state,
776 unsigned int oldstate)
777 {
778 struct uart_sio_port *up = (struct uart_sio_port *)port;
779
780 if (up->pm)
781 up->pm(port, state, oldstate);
782 }
783
784 /*
785 * Resource handling. This is complicated by the fact that resources
786 * depend on the port type. Maybe we should be claiming the standard
787 * 8250 ports, and then trying to get other resources as necessary?
788 */
789 static int
790 m32r_sio_request_std_resource(struct uart_sio_port *up, struct resource **res)
791 {
792 unsigned int size = 8 << up->port.regshift;
793 #ifndef CONFIG_SERIAL_M32R_PLDSIO
794 unsigned long start;
795 #endif
796 int ret = 0;
797
798 switch (up->port.iotype) {
799 case UPIO_MEM:
800 if (up->port.mapbase) {
801 #ifdef CONFIG_SERIAL_M32R_PLDSIO
802 *res = request_mem_region(up->port.mapbase, size, "serial");
803 #else
804 start = up->port.mapbase;
805 *res = request_mem_region(start, size, "serial");
806 #endif
807 if (!*res)
808 ret = -EBUSY;
809 }
810 break;
811
812 case UPIO_PORT:
813 *res = request_region(up->port.iobase, size, "serial");
814 if (!*res)
815 ret = -EBUSY;
816 break;
817 }
818 return ret;
819 }
820
821 static void m32r_sio_release_port(struct uart_port *port)
822 {
823 struct uart_sio_port *up = (struct uart_sio_port *)port;
824 unsigned long start, offset = 0, size = 0;
825
826 size <<= up->port.regshift;
827
828 switch (up->port.iotype) {
829 case UPIO_MEM:
830 if (up->port.mapbase) {
831 /*
832 * Unmap the area.
833 */
834 iounmap(up->port.membase);
835 up->port.membase = NULL;
836
837 start = up->port.mapbase;
838
839 if (size)
840 release_mem_region(start + offset, size);
841 release_mem_region(start, 8 << up->port.regshift);
842 }
843 break;
844
845 case UPIO_PORT:
846 start = up->port.iobase;
847
848 if (size)
849 release_region(start + offset, size);
850 release_region(start + offset, 8 << up->port.regshift);
851 break;
852
853 default:
854 break;
855 }
856 }
857
858 static int m32r_sio_request_port(struct uart_port *port)
859 {
860 struct uart_sio_port *up = (struct uart_sio_port *)port;
861 struct resource *res = NULL;
862 int ret = 0;
863
864 ret = m32r_sio_request_std_resource(up, &res);
865
866 /*
867 * If we have a mapbase, then request that as well.
868 */
869 if (ret == 0 && up->port.flags & UPF_IOREMAP) {
870 int size = resource_size(res);
871
872 up->port.membase = ioremap(up->port.mapbase, size);
873 if (!up->port.membase)
874 ret = -ENOMEM;
875 }
876
877 if (ret < 0) {
878 if (res)
879 release_resource(res);
880 }
881
882 return ret;
883 }
884
885 static void m32r_sio_config_port(struct uart_port *port, int unused)
886 {
887 struct uart_sio_port *up = (struct uart_sio_port *)port;
888 unsigned long flags;
889
890 spin_lock_irqsave(&up->port.lock, flags);
891
892 up->port.fifosize = 1;
893
894 spin_unlock_irqrestore(&up->port.lock, flags);
895 }
896
897 static int
898 m32r_sio_verify_port(struct uart_port *port, struct serial_struct *ser)
899 {
900 if (ser->irq >= nr_irqs || ser->irq < 0 || ser->baud_base < 9600)
901 return -EINVAL;
902 return 0;
903 }
904
905 static struct uart_ops m32r_sio_pops = {
906 .tx_empty = m32r_sio_tx_empty,
907 .set_mctrl = m32r_sio_set_mctrl,
908 .get_mctrl = m32r_sio_get_mctrl,
909 .stop_tx = m32r_sio_stop_tx,
910 .start_tx = m32r_sio_start_tx,
911 .stop_rx = m32r_sio_stop_rx,
912 .enable_ms = m32r_sio_enable_ms,
913 .break_ctl = m32r_sio_break_ctl,
914 .startup = m32r_sio_startup,
915 .shutdown = m32r_sio_shutdown,
916 .set_termios = m32r_sio_set_termios,
917 .pm = m32r_sio_pm,
918 .release_port = m32r_sio_release_port,
919 .request_port = m32r_sio_request_port,
920 .config_port = m32r_sio_config_port,
921 .verify_port = m32r_sio_verify_port,
922 };
923
924 static struct uart_sio_port m32r_sio_ports[UART_NR];
925
926 static void __init m32r_sio_init_ports(void)
927 {
928 struct uart_sio_port *up;
929 static int first = 1;
930 int i;
931
932 if (!first)
933 return;
934 first = 0;
935
936 for (i = 0, up = m32r_sio_ports; i < ARRAY_SIZE(old_serial_port);
937 i++, up++) {
938 up->port.iobase = old_serial_port[i].port;
939 up->port.irq = irq_canonicalize(old_serial_port[i].irq);
940 up->port.uartclk = old_serial_port[i].baud_base * 16;
941 up->port.flags = old_serial_port[i].flags;
942 up->port.membase = old_serial_port[i].iomem_base;
943 up->port.iotype = old_serial_port[i].io_type;
944 up->port.regshift = old_serial_port[i].iomem_reg_shift;
945 up->port.ops = &m32r_sio_pops;
946 }
947 }
948
949 static void __init m32r_sio_register_ports(struct uart_driver *drv)
950 {
951 int i;
952
953 m32r_sio_init_ports();
954
955 for (i = 0; i < UART_NR; i++) {
956 struct uart_sio_port *up = &m32r_sio_ports[i];
957
958 up->port.line = i;
959 up->port.ops = &m32r_sio_pops;
960 init_timer(&up->timer);
961 up->timer.function = m32r_sio_timeout;
962
963 up->mcr_mask = ~0;
964 up->mcr_force = 0;
965
966 uart_add_one_port(drv, &up->port);
967 }
968 }
969
970 #ifdef CONFIG_SERIAL_M32R_SIO_CONSOLE
971
972 /*
973 * Wait for transmitter & holding register to empty
974 */
975 static inline void wait_for_xmitr(struct uart_sio_port *up)
976 {
977 unsigned int status, tmout = 10000;
978
979 /* Wait up to 10ms for the character(s) to be sent. */
980 do {
981 status = sio_in(up, SIOSTS);
982
983 if (--tmout == 0)
984 break;
985 udelay(1);
986 } while ((status & UART_EMPTY) != UART_EMPTY);
987
988 /* Wait up to 1s for flow control if necessary */
989 if (up->port.flags & UPF_CONS_FLOW) {
990 tmout = 1000000;
991 while (--tmout)
992 udelay(1);
993 }
994 }
995
996 static void m32r_sio_console_putchar(struct uart_port *port, int ch)
997 {
998 struct uart_sio_port *up = (struct uart_sio_port *)port;
999
1000 wait_for_xmitr(up);
1001 sio_out(up, SIOTXB, ch);
1002 }
1003
1004 /*
1005 * Print a string to the serial port trying not to disturb
1006 * any possible real use of the port...
1007 *
1008 * The console_lock must be held when we get here.
1009 */
1010 static void m32r_sio_console_write(struct console *co, const char *s,
1011 unsigned int count)
1012 {
1013 struct uart_sio_port *up = &m32r_sio_ports[co->index];
1014 unsigned int ier;
1015
1016 /*
1017 * First save the UER then disable the interrupts
1018 */
1019 ier = sio_in(up, SIOTRCR);
1020 sio_out(up, SIOTRCR, 0);
1021
1022 uart_console_write(&up->port, s, count, m32r_sio_console_putchar);
1023
1024 /*
1025 * Finally, wait for transmitter to become empty
1026 * and restore the IER
1027 */
1028 wait_for_xmitr(up);
1029 sio_out(up, SIOTRCR, ier);
1030 }
1031
1032 static int __init m32r_sio_console_setup(struct console *co, char *options)
1033 {
1034 struct uart_port *port;
1035 int baud = 9600;
1036 int bits = 8;
1037 int parity = 'n';
1038 int flow = 'n';
1039
1040 /*
1041 * Check whether an invalid uart number has been specified, and
1042 * if so, search for the first available port that does have
1043 * console support.
1044 */
1045 if (co->index >= UART_NR)
1046 co->index = 0;
1047 port = &m32r_sio_ports[co->index].port;
1048
1049 /*
1050 * Temporary fix.
1051 */
1052 spin_lock_init(&port->lock);
1053
1054 if (options)
1055 uart_parse_options(options, &baud, &parity, &bits, &flow);
1056
1057 return uart_set_options(port, co, baud, parity, bits, flow);
1058 }
1059
1060 static struct uart_driver m32r_sio_reg;
1061 static struct console m32r_sio_console = {
1062 .name = "ttyS",
1063 .write = m32r_sio_console_write,
1064 .device = uart_console_device,
1065 .setup = m32r_sio_console_setup,
1066 .flags = CON_PRINTBUFFER,
1067 .index = -1,
1068 .data = &m32r_sio_reg,
1069 };
1070
1071 static int __init m32r_sio_console_init(void)
1072 {
1073 sio_reset();
1074 sio_init();
1075 m32r_sio_init_ports();
1076 register_console(&m32r_sio_console);
1077 return 0;
1078 }
1079 console_initcall(m32r_sio_console_init);
1080
1081 #define M32R_SIO_CONSOLE &m32r_sio_console
1082 #else
1083 #define M32R_SIO_CONSOLE NULL
1084 #endif
1085
1086 static struct uart_driver m32r_sio_reg = {
1087 .owner = THIS_MODULE,
1088 .driver_name = "sio",
1089 .dev_name = "ttyS",
1090 .major = TTY_MAJOR,
1091 .minor = 64,
1092 .nr = UART_NR,
1093 .cons = M32R_SIO_CONSOLE,
1094 };
1095
1096 /**
1097 * m32r_sio_suspend_port - suspend one serial port
1098 * @line: serial line number
1099 *
1100 * Suspend one serial port.
1101 */
1102 void m32r_sio_suspend_port(int line)
1103 {
1104 uart_suspend_port(&m32r_sio_reg, &m32r_sio_ports[line].port);
1105 }
1106
1107 /**
1108 * m32r_sio_resume_port - resume one serial port
1109 * @line: serial line number
1110 *
1111 * Resume one serial port.
1112 */
1113 void m32r_sio_resume_port(int line)
1114 {
1115 uart_resume_port(&m32r_sio_reg, &m32r_sio_ports[line].port);
1116 }
1117
1118 static int __init m32r_sio_init(void)
1119 {
1120 int ret, i;
1121
1122 printk(KERN_INFO "Serial: M32R SIO driver\n");
1123
1124 for (i = 0; i < nr_irqs; i++)
1125 spin_lock_init(&irq_lists[i].lock);
1126
1127 ret = uart_register_driver(&m32r_sio_reg);
1128 if (ret >= 0)
1129 m32r_sio_register_ports(&m32r_sio_reg);
1130
1131 return ret;
1132 }
1133
1134 static void __exit m32r_sio_exit(void)
1135 {
1136 int i;
1137
1138 for (i = 0; i < UART_NR; i++)
1139 uart_remove_one_port(&m32r_sio_reg, &m32r_sio_ports[i].port);
1140
1141 uart_unregister_driver(&m32r_sio_reg);
1142 }
1143
1144 module_init(m32r_sio_init);
1145 module_exit(m32r_sio_exit);
1146
1147 EXPORT_SYMBOL(m32r_sio_suspend_port);
1148 EXPORT_SYMBOL(m32r_sio_resume_port);
1149
1150 MODULE_LICENSE("GPL");
1151 MODULE_DESCRIPTION("Generic M32R SIO serial driver");
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