Linux 2.6.33-rc6
[cris-mirror.git] / drivers / gpu / drm / i915 / i915_drv.c
blob46d88965852af5d19001ba24d237bbe293552bf4
1 /* i915_drv.c -- i830,i845,i855,i865,i915 driver -*- linux-c -*-
2 */
3 /*
5 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
6 * All Rights Reserved.
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the
10 * "Software"), to deal in the Software without restriction, including
11 * without limitation the rights to use, copy, modify, merge, publish,
12 * distribute, sub license, and/or sell copies of the Software, and to
13 * permit persons to whom the Software is furnished to do so, subject to
14 * the following conditions:
16 * The above copyright notice and this permission notice (including the
17 * next paragraph) shall be included in all copies or substantial portions
18 * of the Software.
20 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
21 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
23 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
24 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
25 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
26 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
30 #include <linux/device.h>
31 #include "drmP.h"
32 #include "drm.h"
33 #include "i915_drm.h"
34 #include "i915_drv.h"
36 #include <linux/console.h>
37 #include "drm_crtc_helper.h"
39 static int i915_modeset = -1;
40 module_param_named(modeset, i915_modeset, int, 0400);
42 unsigned int i915_fbpercrtc = 0;
43 module_param_named(fbpercrtc, i915_fbpercrtc, int, 0400);
45 unsigned int i915_powersave = 1;
46 module_param_named(powersave, i915_powersave, int, 0400);
48 unsigned int i915_lvds_downclock = 0;
49 module_param_named(lvds_downclock, i915_lvds_downclock, int, 0400);
51 static struct drm_driver driver;
53 #define INTEL_VGA_DEVICE(id, info) { \
54 .class = PCI_CLASS_DISPLAY_VGA << 8, \
55 .class_mask = 0xffff00, \
56 .vendor = 0x8086, \
57 .device = id, \
58 .subvendor = PCI_ANY_ID, \
59 .subdevice = PCI_ANY_ID, \
60 .driver_data = (unsigned long) info }
62 const static struct intel_device_info intel_i830_info = {
63 .is_i8xx = 1, .is_mobile = 1, .cursor_needs_physical = 1,
66 const static struct intel_device_info intel_845g_info = {
67 .is_i8xx = 1,
70 const static struct intel_device_info intel_i85x_info = {
71 .is_i8xx = 1, .is_mobile = 1, .cursor_needs_physical = 1,
74 const static struct intel_device_info intel_i865g_info = {
75 .is_i8xx = 1,
78 const static struct intel_device_info intel_i915g_info = {
79 .is_i915g = 1, .is_i9xx = 1, .cursor_needs_physical = 1,
81 const static struct intel_device_info intel_i915gm_info = {
82 .is_i9xx = 1, .is_mobile = 1, .has_fbc = 1,
83 .cursor_needs_physical = 1,
85 const static struct intel_device_info intel_i945g_info = {
86 .is_i9xx = 1, .has_hotplug = 1, .cursor_needs_physical = 1,
88 const static struct intel_device_info intel_i945gm_info = {
89 .is_i945gm = 1, .is_i9xx = 1, .is_mobile = 1, .has_fbc = 1,
90 .has_hotplug = 1, .cursor_needs_physical = 1,
93 const static struct intel_device_info intel_i965g_info = {
94 .is_i965g = 1, .is_i9xx = 1, .has_hotplug = 1,
97 const static struct intel_device_info intel_i965gm_info = {
98 .is_i965g = 1, .is_mobile = 1, .is_i965gm = 1, .is_i9xx = 1,
99 .is_mobile = 1, .has_fbc = 1, .has_rc6 = 1,
100 .has_hotplug = 1,
103 const static struct intel_device_info intel_g33_info = {
104 .is_g33 = 1, .is_i9xx = 1, .need_gfx_hws = 1,
105 .has_hotplug = 1,
108 const static struct intel_device_info intel_g45_info = {
109 .is_i965g = 1, .is_g4x = 1, .is_i9xx = 1, .need_gfx_hws = 1,
110 .has_pipe_cxsr = 1,
111 .has_hotplug = 1,
114 const static struct intel_device_info intel_gm45_info = {
115 .is_i965g = 1, .is_mobile = 1, .is_g4x = 1, .is_i9xx = 1,
116 .is_mobile = 1, .need_gfx_hws = 1, .has_fbc = 1, .has_rc6 = 1,
117 .has_pipe_cxsr = 1,
118 .has_hotplug = 1,
121 const static struct intel_device_info intel_pineview_info = {
122 .is_g33 = 1, .is_pineview = 1, .is_mobile = 1, .is_i9xx = 1,
123 .has_pipe_cxsr = 1,
124 .has_hotplug = 1,
127 const static struct intel_device_info intel_ironlake_d_info = {
128 .is_ironlake = 1, .is_i965g = 1, .is_i9xx = 1, .need_gfx_hws = 1,
129 .has_pipe_cxsr = 1,
130 .has_hotplug = 1,
133 const static struct intel_device_info intel_ironlake_m_info = {
134 .is_ironlake = 1, .is_mobile = 1, .is_i965g = 1, .is_i9xx = 1,
135 .need_gfx_hws = 1, .has_rc6 = 1,
136 .has_hotplug = 1,
139 const static struct pci_device_id pciidlist[] = {
140 INTEL_VGA_DEVICE(0x3577, &intel_i830_info),
141 INTEL_VGA_DEVICE(0x2562, &intel_845g_info),
142 INTEL_VGA_DEVICE(0x3582, &intel_i85x_info),
143 INTEL_VGA_DEVICE(0x35e8, &intel_i85x_info),
144 INTEL_VGA_DEVICE(0x2572, &intel_i865g_info),
145 INTEL_VGA_DEVICE(0x2582, &intel_i915g_info),
146 INTEL_VGA_DEVICE(0x258a, &intel_i915g_info),
147 INTEL_VGA_DEVICE(0x2592, &intel_i915gm_info),
148 INTEL_VGA_DEVICE(0x2772, &intel_i945g_info),
149 INTEL_VGA_DEVICE(0x27a2, &intel_i945gm_info),
150 INTEL_VGA_DEVICE(0x27ae, &intel_i945gm_info),
151 INTEL_VGA_DEVICE(0x2972, &intel_i965g_info),
152 INTEL_VGA_DEVICE(0x2982, &intel_i965g_info),
153 INTEL_VGA_DEVICE(0x2992, &intel_i965g_info),
154 INTEL_VGA_DEVICE(0x29a2, &intel_i965g_info),
155 INTEL_VGA_DEVICE(0x29b2, &intel_g33_info),
156 INTEL_VGA_DEVICE(0x29c2, &intel_g33_info),
157 INTEL_VGA_DEVICE(0x29d2, &intel_g33_info),
158 INTEL_VGA_DEVICE(0x2a02, &intel_i965gm_info),
159 INTEL_VGA_DEVICE(0x2a12, &intel_i965gm_info),
160 INTEL_VGA_DEVICE(0x2a42, &intel_gm45_info),
161 INTEL_VGA_DEVICE(0x2e02, &intel_g45_info),
162 INTEL_VGA_DEVICE(0x2e12, &intel_g45_info),
163 INTEL_VGA_DEVICE(0x2e22, &intel_g45_info),
164 INTEL_VGA_DEVICE(0x2e32, &intel_g45_info),
165 INTEL_VGA_DEVICE(0x2e42, &intel_g45_info),
166 INTEL_VGA_DEVICE(0xa001, &intel_pineview_info),
167 INTEL_VGA_DEVICE(0xa011, &intel_pineview_info),
168 INTEL_VGA_DEVICE(0x0042, &intel_ironlake_d_info),
169 INTEL_VGA_DEVICE(0x0046, &intel_ironlake_m_info),
170 {0, 0, 0}
173 #if defined(CONFIG_DRM_I915_KMS)
174 MODULE_DEVICE_TABLE(pci, pciidlist);
175 #endif
177 static int i915_suspend(struct drm_device *dev, pm_message_t state)
179 struct drm_i915_private *dev_priv = dev->dev_private;
181 if (!dev || !dev_priv) {
182 DRM_ERROR("dev: %p, dev_priv: %p\n", dev, dev_priv);
183 DRM_ERROR("DRM not initialized, aborting suspend.\n");
184 return -ENODEV;
187 if (state.event == PM_EVENT_PRETHAW)
188 return 0;
190 pci_save_state(dev->pdev);
192 /* If KMS is active, we do the leavevt stuff here */
193 if (drm_core_check_feature(dev, DRIVER_MODESET)) {
194 if (i915_gem_idle(dev))
195 dev_err(&dev->pdev->dev,
196 "GEM idle failed, resume may fail\n");
197 drm_irq_uninstall(dev);
200 i915_save_state(dev);
202 intel_opregion_free(dev, 1);
204 if (state.event == PM_EVENT_SUSPEND) {
205 /* Shut down the device */
206 pci_disable_device(dev->pdev);
207 pci_set_power_state(dev->pdev, PCI_D3hot);
210 /* Modeset on resume, not lid events */
211 dev_priv->modeset_on_lid = 0;
213 return 0;
216 static int i915_resume(struct drm_device *dev)
218 struct drm_i915_private *dev_priv = dev->dev_private;
219 int ret = 0;
221 if (pci_enable_device(dev->pdev))
222 return -1;
223 pci_set_master(dev->pdev);
225 i915_restore_state(dev);
227 intel_opregion_init(dev, 1);
229 /* KMS EnterVT equivalent */
230 if (drm_core_check_feature(dev, DRIVER_MODESET)) {
231 mutex_lock(&dev->struct_mutex);
232 dev_priv->mm.suspended = 0;
234 ret = i915_gem_init_ringbuffer(dev);
235 if (ret != 0)
236 ret = -1;
237 mutex_unlock(&dev->struct_mutex);
239 drm_irq_install(dev);
241 if (drm_core_check_feature(dev, DRIVER_MODESET)) {
242 /* Resume the modeset for every activated CRTC */
243 drm_helper_resume_force_mode(dev);
246 dev_priv->modeset_on_lid = 0;
248 return ret;
252 * i965_reset - reset chip after a hang
253 * @dev: drm device to reset
254 * @flags: reset domains
256 * Reset the chip. Useful if a hang is detected. Returns zero on successful
257 * reset or otherwise an error code.
259 * Procedure is fairly simple:
260 * - reset the chip using the reset reg
261 * - re-init context state
262 * - re-init hardware status page
263 * - re-init ring buffer
264 * - re-init interrupt state
265 * - re-init display
267 int i965_reset(struct drm_device *dev, u8 flags)
269 drm_i915_private_t *dev_priv = dev->dev_private;
270 unsigned long timeout;
271 u8 gdrst;
273 * We really should only reset the display subsystem if we actually
274 * need to
276 bool need_display = true;
278 mutex_lock(&dev->struct_mutex);
281 * Clear request list
283 i915_gem_retire_requests(dev);
285 if (need_display)
286 i915_save_display(dev);
288 if (IS_I965G(dev) || IS_G4X(dev)) {
290 * Set the domains we want to reset, then the reset bit (bit 0).
291 * Clear the reset bit after a while and wait for hardware status
292 * bit (bit 1) to be set
294 pci_read_config_byte(dev->pdev, GDRST, &gdrst);
295 pci_write_config_byte(dev->pdev, GDRST, gdrst | flags | ((flags == GDRST_FULL) ? 0x1 : 0x0));
296 udelay(50);
297 pci_write_config_byte(dev->pdev, GDRST, gdrst & 0xfe);
299 /* ...we don't want to loop forever though, 500ms should be plenty */
300 timeout = jiffies + msecs_to_jiffies(500);
301 do {
302 udelay(100);
303 pci_read_config_byte(dev->pdev, GDRST, &gdrst);
304 } while ((gdrst & 0x1) && time_after(timeout, jiffies));
306 if (gdrst & 0x1) {
307 WARN(true, "i915: Failed to reset chip\n");
308 mutex_unlock(&dev->struct_mutex);
309 return -EIO;
311 } else {
312 DRM_ERROR("Error occurred. Don't know how to reset this chip.\n");
313 return -ENODEV;
316 /* Ok, now get things going again... */
319 * Everything depends on having the GTT running, so we need to start
320 * there. Fortunately we don't need to do this unless we reset the
321 * chip at a PCI level.
323 * Next we need to restore the context, but we don't use those
324 * yet either...
326 * Ring buffer needs to be re-initialized in the KMS case, or if X
327 * was running at the time of the reset (i.e. we weren't VT
328 * switched away).
330 if (drm_core_check_feature(dev, DRIVER_MODESET) ||
331 !dev_priv->mm.suspended) {
332 drm_i915_ring_buffer_t *ring = &dev_priv->ring;
333 struct drm_gem_object *obj = ring->ring_obj;
334 struct drm_i915_gem_object *obj_priv = obj->driver_private;
335 dev_priv->mm.suspended = 0;
337 /* Stop the ring if it's running. */
338 I915_WRITE(PRB0_CTL, 0);
339 I915_WRITE(PRB0_TAIL, 0);
340 I915_WRITE(PRB0_HEAD, 0);
342 /* Initialize the ring. */
343 I915_WRITE(PRB0_START, obj_priv->gtt_offset);
344 I915_WRITE(PRB0_CTL,
345 ((obj->size - 4096) & RING_NR_PAGES) |
346 RING_NO_REPORT |
347 RING_VALID);
348 if (!drm_core_check_feature(dev, DRIVER_MODESET))
349 i915_kernel_lost_context(dev);
350 else {
351 ring->head = I915_READ(PRB0_HEAD) & HEAD_ADDR;
352 ring->tail = I915_READ(PRB0_TAIL) & TAIL_ADDR;
353 ring->space = ring->head - (ring->tail + 8);
354 if (ring->space < 0)
355 ring->space += ring->Size;
358 mutex_unlock(&dev->struct_mutex);
359 drm_irq_uninstall(dev);
360 drm_irq_install(dev);
361 mutex_lock(&dev->struct_mutex);
365 * Display needs restore too...
367 if (need_display)
368 i915_restore_display(dev);
370 mutex_unlock(&dev->struct_mutex);
371 return 0;
375 static int __devinit
376 i915_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
378 return drm_get_dev(pdev, ent, &driver);
381 static void
382 i915_pci_remove(struct pci_dev *pdev)
384 struct drm_device *dev = pci_get_drvdata(pdev);
386 drm_put_dev(dev);
389 static int
390 i915_pci_suspend(struct pci_dev *pdev, pm_message_t state)
392 struct drm_device *dev = pci_get_drvdata(pdev);
394 return i915_suspend(dev, state);
397 static int
398 i915_pci_resume(struct pci_dev *pdev)
400 struct drm_device *dev = pci_get_drvdata(pdev);
402 return i915_resume(dev);
405 static int
406 i915_pm_suspend(struct device *dev)
408 return i915_pci_suspend(to_pci_dev(dev), PMSG_SUSPEND);
411 static int
412 i915_pm_resume(struct device *dev)
414 return i915_pci_resume(to_pci_dev(dev));
417 static int
418 i915_pm_freeze(struct device *dev)
420 return i915_pci_suspend(to_pci_dev(dev), PMSG_FREEZE);
423 static int
424 i915_pm_thaw(struct device *dev)
426 /* thaw during hibernate, do nothing! */
427 return 0;
430 static int
431 i915_pm_poweroff(struct device *dev)
433 return i915_pci_suspend(to_pci_dev(dev), PMSG_HIBERNATE);
436 static int
437 i915_pm_restore(struct device *dev)
439 return i915_pci_resume(to_pci_dev(dev));
442 const struct dev_pm_ops i915_pm_ops = {
443 .suspend = i915_pm_suspend,
444 .resume = i915_pm_resume,
445 .freeze = i915_pm_freeze,
446 .thaw = i915_pm_thaw,
447 .poweroff = i915_pm_poweroff,
448 .restore = i915_pm_restore,
451 static struct vm_operations_struct i915_gem_vm_ops = {
452 .fault = i915_gem_fault,
453 .open = drm_gem_vm_open,
454 .close = drm_gem_vm_close,
457 static struct drm_driver driver = {
458 /* don't use mtrr's here, the Xserver or user space app should
459 * deal with them for intel hardware.
461 .driver_features =
462 DRIVER_USE_AGP | DRIVER_REQUIRE_AGP | /* DRIVER_USE_MTRR |*/
463 DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM,
464 .load = i915_driver_load,
465 .unload = i915_driver_unload,
466 .open = i915_driver_open,
467 .lastclose = i915_driver_lastclose,
468 .preclose = i915_driver_preclose,
469 .postclose = i915_driver_postclose,
471 /* Used in place of i915_pm_ops for non-DRIVER_MODESET */
472 .suspend = i915_suspend,
473 .resume = i915_resume,
475 .device_is_agp = i915_driver_device_is_agp,
476 .enable_vblank = i915_enable_vblank,
477 .disable_vblank = i915_disable_vblank,
478 .irq_preinstall = i915_driver_irq_preinstall,
479 .irq_postinstall = i915_driver_irq_postinstall,
480 .irq_uninstall = i915_driver_irq_uninstall,
481 .irq_handler = i915_driver_irq_handler,
482 .reclaim_buffers = drm_core_reclaim_buffers,
483 .get_map_ofs = drm_core_get_map_ofs,
484 .get_reg_ofs = drm_core_get_reg_ofs,
485 .master_create = i915_master_create,
486 .master_destroy = i915_master_destroy,
487 #if defined(CONFIG_DEBUG_FS)
488 .debugfs_init = i915_debugfs_init,
489 .debugfs_cleanup = i915_debugfs_cleanup,
490 #endif
491 .gem_init_object = i915_gem_init_object,
492 .gem_free_object = i915_gem_free_object,
493 .gem_vm_ops = &i915_gem_vm_ops,
494 .ioctls = i915_ioctls,
495 .fops = {
496 .owner = THIS_MODULE,
497 .open = drm_open,
498 .release = drm_release,
499 .unlocked_ioctl = drm_ioctl,
500 .mmap = drm_gem_mmap,
501 .poll = drm_poll,
502 .fasync = drm_fasync,
503 .read = drm_read,
504 #ifdef CONFIG_COMPAT
505 .compat_ioctl = i915_compat_ioctl,
506 #endif
509 .pci_driver = {
510 .name = DRIVER_NAME,
511 .id_table = pciidlist,
512 .probe = i915_pci_probe,
513 .remove = i915_pci_remove,
514 .driver.pm = &i915_pm_ops,
517 .name = DRIVER_NAME,
518 .desc = DRIVER_DESC,
519 .date = DRIVER_DATE,
520 .major = DRIVER_MAJOR,
521 .minor = DRIVER_MINOR,
522 .patchlevel = DRIVER_PATCHLEVEL,
525 static int __init i915_init(void)
527 driver.num_ioctls = i915_max_ioctl;
529 i915_gem_shrinker_init();
532 * If CONFIG_DRM_I915_KMS is set, default to KMS unless
533 * explicitly disabled with the module pararmeter.
535 * Otherwise, just follow the parameter (defaulting to off).
537 * Allow optional vga_text_mode_force boot option to override
538 * the default behavior.
540 #if defined(CONFIG_DRM_I915_KMS)
541 if (i915_modeset != 0)
542 driver.driver_features |= DRIVER_MODESET;
543 #endif
544 if (i915_modeset == 1)
545 driver.driver_features |= DRIVER_MODESET;
547 #ifdef CONFIG_VGA_CONSOLE
548 if (vgacon_text_force() && i915_modeset == -1)
549 driver.driver_features &= ~DRIVER_MODESET;
550 #endif
552 return drm_init(&driver);
555 static void __exit i915_exit(void)
557 i915_gem_shrinker_exit();
558 drm_exit(&driver);
561 module_init(i915_init);
562 module_exit(i915_exit);
564 MODULE_AUTHOR(DRIVER_AUTHOR);
565 MODULE_DESCRIPTION(DRIVER_DESC);
566 MODULE_LICENSE("GPL and additional rights");