drivers/gpu/drm/radeon/radeon_mode.h

   1 /*
   2  * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and
   3  *                VA Linux Systems Inc., Fremont, California.
   4  * Copyright 2008 Red Hat Inc.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22  * OTHER DEALINGS IN THE SOFTWARE.
  23  *
  24  * Original Authors:
  25  *   Kevin E. Martin, Rickard E. Faith, Alan Hourihane
  26  *
  27  * Kernel port Author: Dave Airlie
  28  */
  29
  30 #ifndef RADEON_MODE_H
  31 #define RADEON_MODE_H
  32
  33 #include <drm_crtc.h>
  34 #include <drm_mode.h>
  35 #include <drm_edid.h>
  36 #include <drm_dp_helper.h>
  37 #include <linux/i2c.h>
  38 #include <linux/i2c-id.h>
  39 #include <linux/i2c-algo-bit.h>
  40 #include "radeon_fixed.h"
  41
  42 struct radeon_device;
  43
  44 #define to_radeon_crtc(x) container_of(x, struct radeon_crtc, base)
  45 #define to_radeon_connector(x) container_of(x, struct radeon_connector, base)
  46 #define to_radeon_encoder(x) container_of(x, struct radeon_encoder, base)
  47 #define to_radeon_framebuffer(x) container_of(x, struct radeon_framebuffer, base)
  48
  49 enum radeon_rmx_type {
  50         RMX_OFF,
  51         RMX_FULL,
  52         RMX_CENTER,
  53         RMX_ASPECT
  54 };
  55
  56 enum radeon_tv_std {
  57         TV_STD_NTSC,
  58         TV_STD_PAL,
  59         TV_STD_PAL_M,
  60         TV_STD_PAL_60,
  61         TV_STD_NTSC_J,
  62         TV_STD_SCART_PAL,
  63         TV_STD_SECAM,
  64         TV_STD_PAL_CN,
  65         TV_STD_PAL_N,
  66 };
  67
  68 /* radeon gpio-based i2c
  69  * 1. "mask" reg and bits
  70  *    grabs the gpio pins for software use
  71  *    0=not held  1=held
  72  * 2. "a" reg and bits
  73  *    output pin value
  74  *    0=low 1=high
  75  * 3. "en" reg and bits
  76  *    sets the pin direction
  77  *    0=input 1=output
  78  * 4. "y" reg and bits
  79  *    input pin value
  80  *    0=low 1=high
  81  */
  82 struct radeon_i2c_bus_rec {
  83         bool valid;
  84         /* id used by atom */
  85         uint8_t i2c_id;
  86         /* can be used with hw i2c engine */
  87         bool hw_capable;
  88         /* uses multi-media i2c engine */
  89         bool mm_i2c;
  90         /* regs and bits */
  91         uint32_t mask_clk_reg;
  92         uint32_t mask_data_reg;
  93         uint32_t a_clk_reg;
  94         uint32_t a_data_reg;
  95         uint32_t en_clk_reg;
  96         uint32_t en_data_reg;
  97         uint32_t y_clk_reg;
  98         uint32_t y_data_reg;
  99         uint32_t mask_clk_mask;
 100         uint32_t mask_data_mask;
 101         uint32_t a_clk_mask;
 102         uint32_t a_data_mask;
 103         uint32_t en_clk_mask;
 104         uint32_t en_data_mask;
 105         uint32_t y_clk_mask;
 106         uint32_t y_data_mask;
 107 };
 108
 109 struct radeon_tmds_pll {
 110     uint32_t freq;
 111     uint32_t value;
 112 };
 113
 114 #define RADEON_MAX_BIOS_CONNECTOR 16
 115
 116 #define RADEON_PLL_USE_BIOS_DIVS        (1 << 0)
 117 #define RADEON_PLL_NO_ODD_POST_DIV      (1 << 1)
 118 #define RADEON_PLL_USE_REF_DIV          (1 << 2)
 119 #define RADEON_PLL_LEGACY               (1 << 3)
 120 #define RADEON_PLL_PREFER_LOW_REF_DIV   (1 << 4)
 121 #define RADEON_PLL_PREFER_HIGH_REF_DIV  (1 << 5)
 122 #define RADEON_PLL_PREFER_LOW_FB_DIV    (1 << 6)
 123 #define RADEON_PLL_PREFER_HIGH_FB_DIV   (1 << 7)
 124 #define RADEON_PLL_PREFER_LOW_POST_DIV  (1 << 8)
 125 #define RADEON_PLL_PREFER_HIGH_POST_DIV (1 << 9)
 126 #define RADEON_PLL_USE_FRAC_FB_DIV      (1 << 10)
 127 #define RADEON_PLL_PREFER_CLOSEST_LOWER (1 << 11)
 128 #define RADEON_PLL_USE_POST_DIV         (1 << 12)
 129
 130 struct radeon_pll {
 131         /* reference frequency */
 132         uint32_t reference_freq;
 133
 134         /* fixed dividers */
 135         uint32_t reference_div;
 136         uint32_t post_div;
 137
 138         /* pll in/out limits */
 139         uint32_t pll_in_min;
 140         uint32_t pll_in_max;
 141         uint32_t pll_out_min;
 142         uint32_t pll_out_max;
 143         uint32_t best_vco;
 144
 145         /* divider limits */
 146         uint32_t min_ref_div;
 147         uint32_t max_ref_div;
 148         uint32_t min_post_div;
 149         uint32_t max_post_div;
 150         uint32_t min_feedback_div;
 151         uint32_t max_feedback_div;
 152         uint32_t min_frac_feedback_div;
 153         uint32_t max_frac_feedback_div;
 154
 155         /* flags for the current clock */
 156         uint32_t flags;
 157
 158         /* pll id */
 159         uint32_t id;
 160 };
 161
 162 struct radeon_i2c_chan {
 163         struct i2c_adapter adapter;
 164         struct drm_device *dev;
 165         union {
 166                 struct i2c_algo_dp_aux_data dp;
 167                 struct i2c_algo_bit_data bit;
 168         } algo;
 169         struct radeon_i2c_bus_rec rec;
 170 };
 171
 172 /* mostly for macs, but really any system without connector tables */
 173 enum radeon_connector_table {
 174         CT_NONE,
 175         CT_GENERIC,
 176         CT_IBOOK,
 177         CT_POWERBOOK_EXTERNAL,
 178         CT_POWERBOOK_INTERNAL,
 179         CT_POWERBOOK_VGA,
 180         CT_MINI_EXTERNAL,
 181         CT_MINI_INTERNAL,
 182         CT_IMAC_G5_ISIGHT,
 183         CT_EMAC,
 184 };
 185
 186 enum radeon_dvo_chip {
 187         DVO_SIL164,
 188         DVO_SIL1178,
 189 };
 190
 191 struct radeon_mode_info {
 192         struct atom_context *atom_context;
 193         struct card_info *atom_card_info;
 194         enum radeon_connector_table connector_table;
 195         bool mode_config_initialized;
 196         struct radeon_crtc *crtcs[2];
 197         /* DVI-I properties */
 198         struct drm_property *coherent_mode_property;
 199         /* DAC enable load detect */
 200         struct drm_property *load_detect_property;
 201         /* TV standard load detect */
 202         struct drm_property *tv_std_property;
 203         /* legacy TMDS PLL detect */
 204         struct drm_property *tmds_pll_property;
 205
 206 };
 207
 208 #define MAX_H_CODE_TIMING_LEN 32
 209 #define MAX_V_CODE_TIMING_LEN 32
 210
 211 /* need to store these as reading
 212    back code tables is excessive */
 213 struct radeon_tv_regs {
 214         uint32_t tv_uv_adr;
 215         uint32_t timing_cntl;
 216         uint32_t hrestart;
 217         uint32_t vrestart;
 218         uint32_t frestart;
 219         uint16_t h_code_timing[MAX_H_CODE_TIMING_LEN];
 220         uint16_t v_code_timing[MAX_V_CODE_TIMING_LEN];
 221 };
 222
 223 struct radeon_crtc {
 224         struct drm_crtc base;
 225         int crtc_id;
 226         u16 lut_r[256], lut_g[256], lut_b[256];
 227         bool enabled;
 228         bool can_tile;
 229         uint32_t crtc_offset;
 230         struct drm_gem_object *cursor_bo;
 231         uint64_t cursor_addr;
 232         int cursor_width;
 233         int cursor_height;
 234         uint32_t legacy_display_base_addr;
 235         uint32_t legacy_cursor_offset;
 236         enum radeon_rmx_type rmx_type;
 237         fixed20_12 vsc;
 238         fixed20_12 hsc;
 239         struct drm_display_mode native_mode;
 240 };
 241
 242 struct radeon_encoder_primary_dac {
 243         /* legacy primary dac */
 244         uint32_t ps2_pdac_adj;
 245 };
 246
 247 struct radeon_encoder_lvds {
 248         /* legacy lvds */
 249         uint16_t panel_vcc_delay;
 250         uint8_t  panel_pwr_delay;
 251         uint8_t  panel_digon_delay;
 252         uint8_t  panel_blon_delay;
 253         uint16_t panel_ref_divider;
 254         uint8_t  panel_post_divider;
 255         uint16_t panel_fb_divider;
 256         bool     use_bios_dividers;
 257         uint32_t lvds_gen_cntl;
 258         /* panel mode */
 259         struct drm_display_mode native_mode;
 260 };
 261
 262 struct radeon_encoder_tv_dac {
 263         /* legacy tv dac */
 264         uint32_t ps2_tvdac_adj;
 265         uint32_t ntsc_tvdac_adj;
 266         uint32_t pal_tvdac_adj;
 267
 268         int               h_pos;
 269         int               v_pos;
 270         int               h_size;
 271         int               supported_tv_stds;
 272         bool              tv_on;
 273         enum radeon_tv_std tv_std;
 274         struct radeon_tv_regs tv;
 275 };
 276
 277 struct radeon_encoder_int_tmds {
 278         /* legacy int tmds */
 279         struct radeon_tmds_pll tmds_pll[4];
 280 };
 281
 282 struct radeon_encoder_ext_tmds {
 283         /* tmds over dvo */
 284         struct radeon_i2c_chan *i2c_bus;
 285         uint8_t slave_addr;
 286         enum radeon_dvo_chip dvo_chip;
 287 };
 288
 289 /* spread spectrum */
 290 struct radeon_atom_ss {
 291         uint16_t percentage;
 292         uint8_t type;
 293         uint8_t step;
 294         uint8_t delay;
 295         uint8_t range;
 296         uint8_t refdiv;
 297 };
 298
 299 struct radeon_encoder_atom_dig {
 300         /* atom dig */
 301         bool coherent_mode;
 302         int dig_block;
 303         /* atom lvds */
 304         uint32_t lvds_misc;
 305         uint16_t panel_pwr_delay;
 306         struct radeon_atom_ss *ss;
 307         /* panel mode */
 308         struct drm_display_mode native_mode;
 309 };
 310
 311 struct radeon_encoder_atom_dac {
 312         enum radeon_tv_std tv_std;
 313 };
 314
 315 struct radeon_encoder {
 316         struct drm_encoder base;
 317         uint32_t encoder_id;
 318         uint32_t devices;
 319         uint32_t active_device;
 320         uint32_t flags;
 321         uint32_t pixel_clock;
 322         enum radeon_rmx_type rmx_type;
 323         struct drm_display_mode native_mode;
 324         void *enc_priv;
 325         int hdmi_offset;
 326         int hdmi_audio_workaround;
 327         int hdmi_buffer_status;
 328 };
 329
 330 struct radeon_connector_atom_dig {
 331         uint32_t igp_lane_info;
 332         bool linkb;
 333         /* displayport */
 334         struct radeon_i2c_chan *dp_i2c_bus;
 335         u8 dpcd[8];
 336         u8 dp_sink_type;
 337         int dp_clock;
 338         int dp_lane_count;
 339 };
 340
 341 struct radeon_gpio_rec {
 342         bool valid;
 343         u8 id;
 344         u32 reg;
 345         u32 mask;
 346 };
 347
 348 enum radeon_hpd_id {
 349         RADEON_HPD_NONE = 0,
 350         RADEON_HPD_1,
 351         RADEON_HPD_2,
 352         RADEON_HPD_3,
 353         RADEON_HPD_4,
 354         RADEON_HPD_5,
 355         RADEON_HPD_6,
 356 };
 357
 358 struct radeon_hpd {
 359         enum radeon_hpd_id hpd;
 360         u8 plugged_state;
 361         struct radeon_gpio_rec gpio;
 362 };
 363
 364 struct radeon_connector {
 365         struct drm_connector base;
 366         uint32_t connector_id;
 367         uint32_t devices;
 368         struct radeon_i2c_chan *ddc_bus;
 369         /* some systems have a an hdmi and vga port with a shared ddc line */
 370         bool shared_ddc;
 371         bool use_digital;
 372         /* we need to mind the EDID between detect
 373            and get modes due to analog/digital/tvencoder */
 374         struct edid *edid;
 375         void *con_priv;
 376         bool dac_load_detect;
 377         uint16_t connector_object_id;
 378         struct radeon_hpd hpd;
 379 };
 380
 381 struct radeon_framebuffer {
 382         struct drm_framebuffer base;
 383         struct drm_gem_object *obj;
 384 };
 385
 386 extern enum radeon_tv_std
 387 radeon_combios_get_tv_info(struct radeon_device *rdev);
 388 extern enum radeon_tv_std
 389 radeon_atombios_get_tv_info(struct radeon_device *rdev);
 390
 391 extern void radeon_connector_hotplug(struct drm_connector *connector);
 392 extern bool radeon_dp_needs_link_train(struct radeon_connector *radeon_connector);
 393 extern int radeon_dp_mode_valid_helper(struct radeon_connector *radeon_connector,
 394                                        struct drm_display_mode *mode);
 395 extern void radeon_dp_set_link_config(struct drm_connector *connector,
 396                                       struct drm_display_mode *mode);
 397 extern void dp_link_train(struct drm_encoder *encoder,
 398                           struct drm_connector *connector);
 399 extern u8 radeon_dp_getsinktype(struct radeon_connector *radeon_connector);
 400 extern bool radeon_dp_getdpcd(struct radeon_connector *radeon_connector);
 401 extern void atombios_dig_transmitter_setup(struct drm_encoder *encoder,
 402                                            int action, uint8_t lane_num,
 403                                            uint8_t lane_set);
 404 extern int radeon_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode,
 405                                 uint8_t write_byte, uint8_t *read_byte);
 406
 407 extern struct radeon_i2c_chan *radeon_i2c_create_dp(struct drm_device *dev,
 408                                                     struct radeon_i2c_bus_rec *rec,
 409                                                     const char *name);
 410 extern struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev,
 411                                                  struct radeon_i2c_bus_rec *rec,
 412                                                  const char *name);
 413 extern void radeon_i2c_destroy(struct radeon_i2c_chan *i2c);
 414 extern void radeon_i2c_sw_get_byte(struct radeon_i2c_chan *i2c_bus,
 415                                    u8 slave_addr,
 416                                    u8 addr,
 417                                    u8 *val);
 418 extern void radeon_i2c_sw_put_byte(struct radeon_i2c_chan *i2c,
 419                                    u8 slave_addr,
 420                                    u8 addr,
 421                                    u8 val);
 422 extern bool radeon_ddc_probe(struct radeon_connector *radeon_connector);
 423 extern int radeon_ddc_get_modes(struct radeon_connector *radeon_connector);
 424
 425 extern struct drm_encoder *radeon_best_encoder(struct drm_connector *connector);
 426
 427 extern void radeon_compute_pll(struct radeon_pll *pll,
 428                                uint64_t freq,
 429                                uint32_t *dot_clock_p,
 430                                uint32_t *fb_div_p,
 431                                uint32_t *frac_fb_div_p,
 432                                uint32_t *ref_div_p,
 433                                uint32_t *post_div_p);
 434
 435 extern void radeon_compute_pll_avivo(struct radeon_pll *pll,
 436                                      uint64_t freq,
 437                                      uint32_t *dot_clock_p,
 438                                      uint32_t *fb_div_p,
 439                                      uint32_t *frac_fb_div_p,
 440                                      uint32_t *ref_div_p,
 441                                      uint32_t *post_div_p);
 442
 443 extern void radeon_setup_encoder_clones(struct drm_device *dev);
 444
 445 struct drm_encoder *radeon_encoder_legacy_lvds_add(struct drm_device *dev, int bios_index);
 446 struct drm_encoder *radeon_encoder_legacy_primary_dac_add(struct drm_device *dev, int bios_index, int with_tv);
 447 struct drm_encoder *radeon_encoder_legacy_tv_dac_add(struct drm_device *dev, int bios_index, int with_tv);
 448 struct drm_encoder *radeon_encoder_legacy_tmds_int_add(struct drm_device *dev, int bios_index);
 449 struct drm_encoder *radeon_encoder_legacy_tmds_ext_add(struct drm_device *dev, int bios_index);
 450 extern void atombios_external_tmds_setup(struct drm_encoder *encoder, int action);
 451 extern void atombios_digital_setup(struct drm_encoder *encoder, int action);
 452 extern int atombios_get_encoder_mode(struct drm_encoder *encoder);
 453 extern void radeon_encoder_set_active_device(struct drm_encoder *encoder);
 454
 455 extern void radeon_crtc_load_lut(struct drm_crtc *crtc);
 456 extern int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y,
 457                                    struct drm_framebuffer *old_fb);
 458 extern int atombios_crtc_mode_set(struct drm_crtc *crtc,
 459                                    struct drm_display_mode *mode,
 460                                    struct drm_display_mode *adjusted_mode,
 461                                    int x, int y,
 462                                    struct drm_framebuffer *old_fb);
 463 extern void atombios_crtc_dpms(struct drm_crtc *crtc, int mode);
 464
 465 extern int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y,
 466                                  struct drm_framebuffer *old_fb);
 467
 468 extern int radeon_crtc_cursor_set(struct drm_crtc *crtc,
 469                                   struct drm_file *file_priv,
 470                                   uint32_t handle,
 471                                   uint32_t width,
 472                                   uint32_t height);
 473 extern int radeon_crtc_cursor_move(struct drm_crtc *crtc,
 474                                    int x, int y);
 475
 476 extern bool radeon_atom_get_clock_info(struct drm_device *dev);
 477 extern bool radeon_combios_get_clock_info(struct drm_device *dev);
 478 extern struct radeon_encoder_atom_dig *
 479 radeon_atombios_get_lvds_info(struct radeon_encoder *encoder);
 480 extern bool radeon_atombios_get_tmds_info(struct radeon_encoder *encoder,
 481                                           struct radeon_encoder_int_tmds *tmds);
 482 extern bool radeon_legacy_get_tmds_info_from_combios(struct radeon_encoder *encoder,
 483                                                      struct radeon_encoder_int_tmds *tmds);
 484 extern bool radeon_legacy_get_tmds_info_from_table(struct radeon_encoder *encoder,
 485                                                    struct radeon_encoder_int_tmds *tmds);
 486 extern bool radeon_legacy_get_ext_tmds_info_from_combios(struct radeon_encoder *encoder,
 487                                                          struct radeon_encoder_ext_tmds *tmds);
 488 extern bool radeon_legacy_get_ext_tmds_info_from_table(struct radeon_encoder *encoder,
 489                                                        struct radeon_encoder_ext_tmds *tmds);
 490 extern struct radeon_encoder_primary_dac *
 491 radeon_atombios_get_primary_dac_info(struct radeon_encoder *encoder);
 492 extern struct radeon_encoder_tv_dac *
 493 radeon_atombios_get_tv_dac_info(struct radeon_encoder *encoder);
 494 extern struct radeon_encoder_lvds *
 495 radeon_combios_get_lvds_info(struct radeon_encoder *encoder);
 496 extern void radeon_combios_get_ext_tmds_info(struct radeon_encoder *encoder);
 497 extern struct radeon_encoder_tv_dac *
 498 radeon_combios_get_tv_dac_info(struct radeon_encoder *encoder);
 499 extern struct radeon_encoder_primary_dac *
 500 radeon_combios_get_primary_dac_info(struct radeon_encoder *encoder);
 501 extern bool radeon_combios_external_tmds_setup(struct drm_encoder *encoder);
 502 extern void radeon_external_tmds_setup(struct drm_encoder *encoder);
 503 extern void radeon_combios_output_lock(struct drm_encoder *encoder, bool lock);
 504 extern void radeon_combios_initialize_bios_scratch_regs(struct drm_device *dev);
 505 extern void radeon_atom_output_lock(struct drm_encoder *encoder, bool lock);
 506 extern void radeon_atom_initialize_bios_scratch_regs(struct drm_device *dev);
 507 extern void radeon_save_bios_scratch_regs(struct radeon_device *rdev);
 508 extern void radeon_restore_bios_scratch_regs(struct radeon_device *rdev);
 509 extern void
 510 radeon_atombios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
 511 extern void
 512 radeon_atombios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on);
 513 extern void
 514 radeon_combios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
 515 extern void
 516 radeon_combios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on);
 517 extern void radeon_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
 518                                      u16 blue, int regno);
 519 extern void radeon_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
 520                                      u16 *blue, int regno);
 521 struct drm_framebuffer *radeon_framebuffer_create(struct drm_device *dev,
 522                                                   struct drm_mode_fb_cmd *mode_cmd,
 523                                                   struct drm_gem_object *obj);
 524
 525 int radeonfb_probe(struct drm_device *dev);
 526
 527 int radeonfb_remove(struct drm_device *dev, struct drm_framebuffer *fb);
 528 bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev);
 529 bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev);
 530 void radeon_atombios_init_crtc(struct drm_device *dev,
 531                                struct radeon_crtc *radeon_crtc);
 532 void radeon_legacy_init_crtc(struct drm_device *dev,
 533                              struct radeon_crtc *radeon_crtc);
 534 extern void radeon_i2c_do_lock(struct radeon_i2c_chan *i2c, int lock_state);
 535
 536 void radeon_get_clock_info(struct drm_device *dev);
 537
 538 extern bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev);
 539 extern bool radeon_get_atom_connector_info_from_supported_devices_table(struct drm_device *dev);
 540
 541 void radeon_enc_destroy(struct drm_encoder *encoder);
 542 void radeon_copy_fb(struct drm_device *dev, struct drm_gem_object *dst_obj);
 543 void radeon_combios_asic_init(struct drm_device *dev);
 544 extern int radeon_static_clocks_init(struct drm_device *dev);
 545 bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc,
 546                                         struct drm_display_mode *mode,
 547                                         struct drm_display_mode *adjusted_mode);
 548 void atom_rv515_force_tv_scaler(struct radeon_device *rdev, struct radeon_crtc *radeon_crtc);
 549
 550 /* legacy tv */
 551 void radeon_legacy_tv_adjust_crtc_reg(struct drm_encoder *encoder,
 552                                       uint32_t *h_total_disp, uint32_t *h_sync_strt_wid,
 553                                       uint32_t *v_total_disp, uint32_t *v_sync_strt_wid);
 554 void radeon_legacy_tv_adjust_pll1(struct drm_encoder *encoder,
 555                                   uint32_t *htotal_cntl, uint32_t *ppll_ref_div,
 556                                   uint32_t *ppll_div_3, uint32_t *pixclks_cntl);
 557 void radeon_legacy_tv_adjust_pll2(struct drm_encoder *encoder,
 558                                   uint32_t *htotal2_cntl, uint32_t *p2pll_ref_div,
 559                                   uint32_t *p2pll_div_0, uint32_t *pixclks_cntl);
 560 void radeon_legacy_tv_mode_set(struct drm_encoder *encoder,
 561                                struct drm_display_mode *mode,
 562                                struct drm_display_mode *adjusted_mode);
 563 #endif