1 # SPDX-License-Identifier: GPL-2.0
6 select ACPI_GENERIC_GSI if ACPI
7 select ACPI_MCFG if ACPI
8 select ACPI_HOTPLUG_CPU if ACPI_PROCESSOR && HOTPLUG_CPU
9 select ACPI_PPTT if ACPI
10 select ACPI_SYSTEM_POWER_STATES_SUPPORT if ACPI
11 select ARCH_BINFMT_ELF_STATE
12 select ARCH_DISABLE_KASAN_INLINE
13 select ARCH_ENABLE_MEMORY_HOTPLUG
14 select ARCH_ENABLE_MEMORY_HOTREMOVE
15 select ARCH_ENABLE_THP_MIGRATION if TRANSPARENT_HUGEPAGE
16 select ARCH_HAS_ACPI_TABLE_UPGRADE if ACPI
17 select ARCH_HAS_CPU_FINALIZE_INIT
18 select ARCH_HAS_CURRENT_STACK_POINTER
19 select ARCH_HAS_DEBUG_VM_PGTABLE
20 select ARCH_HAS_FAST_MULTIPLIER
21 select ARCH_HAS_FORTIFY_SOURCE
23 select ARCH_HAS_KERNEL_FPU_SUPPORT if CPU_HAS_FPU
24 select ARCH_HAS_NMI_SAFE_THIS_CPU_OPS
25 select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE
26 select ARCH_HAS_PTE_DEVMAP
27 select ARCH_HAS_PTE_SPECIAL
28 select ARCH_HAS_SET_MEMORY
29 select ARCH_HAS_SET_DIRECT_MAP
30 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
31 select ARCH_INLINE_READ_LOCK if !PREEMPTION
32 select ARCH_INLINE_READ_LOCK_BH if !PREEMPTION
33 select ARCH_INLINE_READ_LOCK_IRQ if !PREEMPTION
34 select ARCH_INLINE_READ_LOCK_IRQSAVE if !PREEMPTION
35 select ARCH_INLINE_READ_UNLOCK if !PREEMPTION
36 select ARCH_INLINE_READ_UNLOCK_BH if !PREEMPTION
37 select ARCH_INLINE_READ_UNLOCK_IRQ if !PREEMPTION
38 select ARCH_INLINE_READ_UNLOCK_IRQRESTORE if !PREEMPTION
39 select ARCH_INLINE_WRITE_LOCK if !PREEMPTION
40 select ARCH_INLINE_WRITE_LOCK_BH if !PREEMPTION
41 select ARCH_INLINE_WRITE_LOCK_IRQ if !PREEMPTION
42 select ARCH_INLINE_WRITE_LOCK_IRQSAVE if !PREEMPTION
43 select ARCH_INLINE_WRITE_UNLOCK if !PREEMPTION
44 select ARCH_INLINE_WRITE_UNLOCK_BH if !PREEMPTION
45 select ARCH_INLINE_WRITE_UNLOCK_IRQ if !PREEMPTION
46 select ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE if !PREEMPTION
47 select ARCH_INLINE_SPIN_TRYLOCK if !PREEMPTION
48 select ARCH_INLINE_SPIN_TRYLOCK_BH if !PREEMPTION
49 select ARCH_INLINE_SPIN_LOCK if !PREEMPTION
50 select ARCH_INLINE_SPIN_LOCK_BH if !PREEMPTION
51 select ARCH_INLINE_SPIN_LOCK_IRQ if !PREEMPTION
52 select ARCH_INLINE_SPIN_LOCK_IRQSAVE if !PREEMPTION
53 select ARCH_INLINE_SPIN_UNLOCK if !PREEMPTION
54 select ARCH_INLINE_SPIN_UNLOCK_BH if !PREEMPTION
55 select ARCH_INLINE_SPIN_UNLOCK_IRQ if !PREEMPTION
56 select ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE if !PREEMPTION
57 select ARCH_KEEP_MEMBLOCK
58 select ARCH_MIGHT_HAVE_PC_PARPORT
59 select ARCH_MIGHT_HAVE_PC_SERIO
60 select ARCH_SPARSEMEM_ENABLE
62 select ARCH_SUPPORTS_ACPI
63 select ARCH_SUPPORTS_ATOMIC_RMW
64 select ARCH_SUPPORTS_HUGETLBFS
65 select ARCH_SUPPORTS_INT128 if CC_HAS_INT128
66 select ARCH_SUPPORTS_LTO_CLANG
67 select ARCH_SUPPORTS_LTO_CLANG_THIN
68 select ARCH_SUPPORTS_NUMA_BALANCING
69 select ARCH_USE_BUILTIN_BSWAP
70 select ARCH_USE_CMPXCHG_LOCKREF
71 select ARCH_USE_QUEUED_RWLOCKS
72 select ARCH_USE_QUEUED_SPINLOCKS
73 select ARCH_WANT_DEFAULT_BPF_JIT
74 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT
75 select ARCH_WANT_LD_ORPHAN_WARN
76 select ARCH_WANT_OPTIMIZE_HUGETLB_VMEMMAP
77 select ARCH_WANTS_NO_INSTR
78 select ARCH_WANTS_THP_SWAP if HAVE_ARCH_TRANSPARENT_HUGEPAGE
79 select BUILDTIME_TABLE_SORT
83 select GENERIC_CLOCKEVENTS
84 select GENERIC_CMOS_UPDATE
85 select GENERIC_CPU_AUTOPROBE
86 select GENERIC_CPU_DEVICES
87 select GENERIC_CPU_VULNERABILITIES
89 select GENERIC_GETTIMEOFDAY
90 select GENERIC_IOREMAP if !ARCH_IOREMAP
91 select GENERIC_IRQ_MATRIX_ALLOCATOR
92 select GENERIC_IRQ_MULTI_HANDLER
93 select GENERIC_IRQ_PROBE
94 select GENERIC_IRQ_SHOW
95 select GENERIC_LIB_ASHLDI3
96 select GENERIC_LIB_ASHRDI3
97 select GENERIC_LIB_CMPDI2
98 select GENERIC_LIB_LSHRDI3
99 select GENERIC_LIB_UCMPDI2
100 select GENERIC_LIB_DEVMEM_IS_ALLOWED
101 select GENERIC_PCI_IOMAP
102 select GENERIC_SCHED_CLOCK
103 select GENERIC_SMP_IDLE_THREAD
104 select GENERIC_TIME_VSYSCALL
105 select GENERIC_VDSO_TIME_NS
108 select HAVE_ARCH_AUDITSYSCALL
109 select HAVE_ARCH_JUMP_LABEL
110 select HAVE_ARCH_JUMP_LABEL_RELATIVE
111 select HAVE_ARCH_KASAN
112 select HAVE_ARCH_KFENCE
113 select HAVE_ARCH_KGDB if PERF_EVENTS
114 select HAVE_ARCH_MMAP_RND_BITS if MMU
115 select HAVE_ARCH_RANDOMIZE_KSTACK_OFFSET
116 select HAVE_ARCH_SECCOMP
117 select HAVE_ARCH_SECCOMP_FILTER
118 select HAVE_ARCH_TRACEHOOK
119 select HAVE_ARCH_TRANSPARENT_HUGEPAGE
120 select HAVE_ARCH_USERFAULTFD_MINOR if USERFAULTFD
121 select HAVE_ASM_MODVERSIONS
122 select HAVE_CONTEXT_TRACKING_USER
123 select HAVE_C_RECORDMCOUNT
124 select HAVE_DEBUG_KMEMLEAK
125 select HAVE_DEBUG_STACKOVERFLOW
126 select HAVE_DMA_CONTIGUOUS
127 select HAVE_DYNAMIC_FTRACE
128 select HAVE_DYNAMIC_FTRACE_WITH_ARGS
129 select HAVE_DYNAMIC_FTRACE_WITH_DIRECT_CALLS
130 select HAVE_DYNAMIC_FTRACE_WITH_REGS
132 select HAVE_EFFICIENT_UNALIGNED_ACCESS if !ARCH_STRICT_ALIGN
133 select HAVE_EXIT_THREAD
135 select HAVE_FTRACE_MCOUNT_RECORD
136 select HAVE_FUNCTION_ARG_ACCESS_API
137 select HAVE_FUNCTION_ERROR_INJECTION
138 select HAVE_FUNCTION_GRAPH_RETVAL if HAVE_FUNCTION_GRAPH_TRACER
139 select HAVE_FUNCTION_GRAPH_TRACER
140 select HAVE_FUNCTION_TRACER
141 select HAVE_GCC_PLUGINS
142 select HAVE_GENERIC_VDSO
143 select HAVE_HW_BREAKPOINT if PERF_EVENTS
144 select HAVE_IOREMAP_PROT
145 select HAVE_IRQ_EXIT_ON_IRQ_STACK
146 select HAVE_IRQ_TIME_ACCOUNTING
148 select HAVE_KPROBES_ON_FTRACE
149 select HAVE_KRETPROBES
150 select HAVE_LIVEPATCH
151 select HAVE_MOD_ARCH_SPECIFIC
153 select HAVE_OBJTOOL if AS_HAS_EXPLICIT_RELOCS && AS_HAS_THIN_ADD_SUB
155 select HAVE_PERF_EVENTS
156 select HAVE_PERF_REGS
157 select HAVE_PERF_USER_STACK_DUMP
158 select HAVE_PREEMPT_DYNAMIC_KEY
159 select HAVE_REGS_AND_STACK_ACCESS_API
160 select HAVE_RELIABLE_STACKTRACE if UNWINDER_ORC
164 select HAVE_SAMPLE_FTRACE_DIRECT
165 select HAVE_SAMPLE_FTRACE_DIRECT_MULTI
166 select HAVE_SETUP_PER_CPU_AREA if NUMA
167 select HAVE_STACK_VALIDATION if HAVE_OBJTOOL
168 select HAVE_STACKPROTECTOR
169 select HAVE_SYSCALL_TRACEPOINTS
171 select HAVE_VIRT_CPU_ACCOUNTING_GEN if !SMP
172 select IRQ_FORCED_THREADING
173 select IRQ_LOONGARCH_CPU
174 select LOCK_MM_AND_FIND_VMA
175 select MMU_GATHER_MERGE_VMAS if MMU
176 select MODULES_USE_ELF_RELA if MODULES
177 select NEED_PER_CPU_EMBED_FIRST_CHUNK
178 select NEED_PER_CPU_PAGE_FIRST_CHUNK
180 select OF_EARLY_FLATTREE
182 select PCI_DOMAINS_GENERIC
183 select PCI_ECAM if ACPI
185 select PCI_MSI_ARCH_FALLBACKS
187 select PERF_USE_VMALLOC
190 select SYSCTL_ARCH_UNALIGN_ALLOW
191 select SYSCTL_ARCH_UNALIGN_NO_WARN
192 select SYSCTL_EXCEPTION_TRACE
194 select TRACE_IRQFLAGS_SUPPORT
195 select USE_PERCPU_NUMA_NODE_ID
196 select USER_STACKTRACE_SUPPORT
197 select VDSO_GETRANDOM
210 config GENERIC_BUG_RELATIVE_POINTERS
212 depends on GENERIC_BUG
214 config GENERIC_CALIBRATE_DELAY
220 config GENERIC_HWEIGHT
223 config L1_CACHE_SHIFT
227 config LOCKDEP_SUPPORT
231 config STACKTRACE_SUPPORT
235 # MACH_LOONGSON32 and MACH_LOONGSON64 are deliberately carried over from the
236 # MIPS Loongson code, to preserve Loongson-specific code paths in drivers that
237 # are shared between architectures, and specifically expecting the symbols.
238 config MACH_LOONGSON32
241 config MACH_LOONGSON64
244 config FIX_EARLYCON_MEM
247 config PGTABLE_2LEVEL
250 config PGTABLE_3LEVEL
253 config PGTABLE_4LEVEL
256 config PGTABLE_LEVELS
258 default 2 if PGTABLE_2LEVEL
259 default 3 if PGTABLE_3LEVEL
260 default 4 if PGTABLE_4LEVEL
262 config SCHED_OMIT_FRAME_POINTER
266 config AS_HAS_EXPLICIT_RELOCS
267 def_bool $(as-instr,x:pcalau12i \$t0$(comma)%pc_hi20(x))
269 config AS_HAS_FCSR_CLASS
270 def_bool $(as-instr,movfcsr2gr \$t0$(comma)\$fcsr0)
272 config AS_HAS_THIN_ADD_SUB
273 def_bool $(cc-option,-Wa$(comma)-mthin-add-sub) || AS_IS_LLVM
275 config AS_HAS_LSX_EXTENSION
276 def_bool $(as-instr,vld \$vr0$(comma)\$a0$(comma)0)
278 config AS_HAS_LASX_EXTENSION
279 def_bool $(as-instr,xvld \$xr0$(comma)\$a0$(comma)0)
281 config AS_HAS_LBT_EXTENSION
282 def_bool $(as-instr,movscr2gr \$a0$(comma)\$scr0)
284 config AS_HAS_LVZ_EXTENSION
285 def_bool $(as-instr,hvcl 0)
287 menu "Kernel type and options"
289 source "kernel/Kconfig.hz"
292 prompt "Page Table Layout"
293 default 16KB_2LEVEL if 32BIT
294 default 16KB_3LEVEL if 64BIT
296 Allows choosing the page table layout, which is a combination
297 of page size and page table levels. The size of virtual memory
298 address space are determined by the page table layout.
301 bool "4KB with 3 levels"
302 select HAVE_PAGE_SIZE_4KB
303 select PGTABLE_3LEVEL
305 This option selects 4KB page size with 3 level page tables, which
306 support a maximum of 39 bits of application virtual memory.
309 bool "4KB with 4 levels"
310 select HAVE_PAGE_SIZE_4KB
311 select PGTABLE_4LEVEL
313 This option selects 4KB page size with 4 level page tables, which
314 support a maximum of 48 bits of application virtual memory.
317 bool "16KB with 2 levels"
318 select HAVE_PAGE_SIZE_16KB
319 select PGTABLE_2LEVEL
321 This option selects 16KB page size with 2 level page tables, which
322 support a maximum of 36 bits of application virtual memory.
325 bool "16KB with 3 levels"
326 select HAVE_PAGE_SIZE_16KB
327 select PGTABLE_3LEVEL
329 This option selects 16KB page size with 3 level page tables, which
330 support a maximum of 47 bits of application virtual memory.
333 bool "64KB with 2 levels"
334 select HAVE_PAGE_SIZE_64KB
335 select PGTABLE_2LEVEL
337 This option selects 64KB page size with 2 level page tables, which
338 support a maximum of 42 bits of application virtual memory.
341 bool "64KB with 3 levels"
342 select HAVE_PAGE_SIZE_64KB
343 select PGTABLE_3LEVEL
345 This option selects 64KB page size with 3 level page tables, which
346 support a maximum of 55 bits of application virtual memory.
351 string "Built-in kernel command line"
353 For most platforms, the arguments for the kernel's command line
354 are provided at run-time, during boot. However, there are cases
355 where either no arguments are being provided or the provided
356 arguments are insufficient or even invalid.
358 When that occurs, it is possible to define a built-in command
359 line here and choose how the kernel should use it later on.
362 prompt "Kernel command line type"
363 default CMDLINE_BOOTLOADER
365 Choose how the kernel will handle the provided built-in command
368 config CMDLINE_BOOTLOADER
369 bool "Use bootloader kernel arguments if available"
371 Prefer the command-line passed by the boot loader if available.
372 Use the built-in command line as fallback in case we get nothing
373 during boot. This is the default behaviour.
375 config CMDLINE_EXTEND
376 bool "Use built-in to extend bootloader kernel arguments"
378 The command-line arguments provided during boot will be
379 appended to the built-in command line. This is useful in
380 cases where the provided arguments are insufficient and
381 you don't want to or cannot modify them.
384 bool "Always use the built-in kernel command string"
386 Always use the built-in command line, even if we get one during
387 boot. This is useful in case you need to override the provided
388 command line on systems where you don't have or want control
394 bool "Enable built-in dtb in kernel"
397 Some existing systems do not provide a canonical device tree to
398 the kernel at boot time. Let's provide a device tree table in the
399 kernel, keyed by the dts filename, containing the relevant DTBs.
401 Built-in DTBs are generic enough and can be used as references.
403 config BUILTIN_DTB_NAME
404 string "Source file for built-in dtb"
405 depends on BUILTIN_DTB
407 Base name (without suffix, relative to arch/loongarch/boot/dts/)
408 for the DTS file that will be used to produce the DTB linked into
412 bool "Enable DMI scanning"
413 select DMI_SCAN_MACHINE_NON_EFI_FALLBACK
416 This enables SMBIOS/DMI feature for systems, and scanning of
417 DMI to identify machine quirks.
420 bool "EFI runtime service support"
422 select EFI_RUNTIME_WRAPPERS
424 This enables the kernel to use EFI runtime services that are
425 available (such as the EFI variable services).
428 bool "EFI boot stub support"
431 select EFI_GENERIC_STUB
433 This kernel feature allows the kernel to be loaded directly by
434 EFI firmware without the use of a bootloader.
437 bool "SMT scheduler support"
441 Improves scheduler's performance when there are multiple
442 threads in one physical core.
445 bool "Multi-Processing support"
447 This enables support for systems with more than one CPU. If you have
448 a system with only one CPU, say N. If you have a system with more
451 If you say N here, the kernel will run on uni- and multiprocessor
452 machines, but will use only one CPU of a multiprocessor machine. If
453 you say Y here, the kernel will run on many, but not all,
454 uniprocessor machines. On a uniprocessor machine, the kernel
455 will run faster if you say N here.
457 See also the SMP-HOWTO available at <http://www.tldp.org/docs.html#howto>.
459 If you don't know what to do here, say N.
462 bool "Support for hot-pluggable CPUs"
464 select GENERIC_IRQ_MIGRATION
466 Say Y here to allow turning CPUs off and on. CPUs can be
467 controlled through /sys/devices/system/cpu.
468 (Note: power management support will enable this option
469 automatically on SMP systems. )
470 Say N if you want to disable CPU hotplug.
473 int "Maximum number of CPUs (2-256)"
478 This allows you to specify the maximum number of CPUs which this
485 Say Y to compile the kernel with NUMA (Non-Uniform Memory Access)
486 support. This option improves performance on systems with more
487 than one NUMA node; on single node systems it is generally better
488 to leave it disabled.
495 config ARCH_FORCE_MAX_ORDER
496 int "Maximum zone order"
497 default "13" if PAGE_SIZE_64KB
498 default "11" if PAGE_SIZE_16KB
501 The kernel memory allocator divides physically contiguous memory
502 blocks into "zones", where each zone is a power of two number of
503 pages. This option selects the largest power of two that the kernel
504 keeps in the memory allocator. If you need to allocate very large
505 blocks of physically contiguous memory, then you may need to
508 The page size is not necessarily 4KB. Keep this in mind
509 when choosing a value for this option.
512 bool "Enable LoongArch DMW-based ioremap()"
514 We use generic TLB-based ioremap() by default since it has page
515 protection support. However, you can enable LoongArch DMW-based
516 ioremap() for better performance.
518 config ARCH_WRITECOMBINE
519 bool "Enable WriteCombine (WUC) for ioremap()"
521 LoongArch maintains cache coherency in hardware, but when paired
522 with LS7A chipsets the WUC attribute (Weak-ordered UnCached, which
523 is similar to WriteCombine) is out of the scope of cache coherency
524 machanism for PCIe devices (this is a PCIe protocol violation, which
525 may be fixed in newer chipsets).
527 This means WUC can only used for write-only memory regions now, so
528 this option is disabled by default, making WUC silently fallback to
529 SUC for ioremap(). You can enable this option if the kernel is ensured
530 to run on hardware without this bug.
532 You can override this setting via writecombine=on/off boot parameter.
534 config ARCH_STRICT_ALIGN
535 bool "Enable -mstrict-align to prevent unaligned accesses" if EXPERT
538 Not all LoongArch cores support h/w unaligned access, we can use
539 -mstrict-align build parameter to prevent unaligned accesses.
541 CPUs with h/w unaligned access support:
542 Loongson-2K2000/2K3000/3A5000/3C5000/3D5000.
544 CPUs without h/w unaligned access support:
545 Loongson-2K500/2K1000.
547 This option is enabled by default to make the kernel be able to run
548 on all LoongArch systems. But you can disable it manually if you want
549 to run kernel only on systems with h/w unaligned access support in
550 order to optimise for performance.
557 bool "Support for the Loongson SIMD Extension"
558 depends on AS_HAS_LSX_EXTENSION
560 Loongson SIMD Extension (LSX) introduces 128 bit wide vector registers
561 and a set of SIMD instructions to operate on them. When this option
562 is enabled the kernel will support allocating & switching LSX
563 vector register contexts. If you know that your kernel will only be
564 running on CPUs which do not support LSX or that your userland will
565 not be making use of it then you may wish to say N here to reduce
566 the size & complexity of your kernel.
571 bool "Support for the Loongson Advanced SIMD Extension"
572 depends on CPU_HAS_LSX
573 depends on AS_HAS_LASX_EXTENSION
575 Loongson Advanced SIMD Extension (LASX) introduces 256 bit wide vector
576 registers and a set of SIMD instructions to operate on them. When this
577 option is enabled the kernel will support allocating & switching LASX
578 vector register contexts. If you know that your kernel will only be
579 running on CPUs which do not support LASX or that your userland will
580 not be making use of it then you may wish to say N here to reduce
581 the size & complexity of your kernel.
586 bool "Support for the Loongson Binary Translation Extension"
587 depends on AS_HAS_LBT_EXTENSION
589 Loongson Binary Translation (LBT) introduces 4 scratch registers (SCR0
590 to SCR3), x86/ARM eflags (eflags) and x87 fpu stack pointer (ftop).
591 Enabling this option allows the kernel to allocate and switch registers
594 If you want to use this feature, such as the Loongson Architecture
595 Translator (LAT), say Y.
597 config CPU_HAS_PREFETCH
601 config ARCH_SUPPORTS_KEXEC
604 config ARCH_SUPPORTS_CRASH_DUMP
607 config ARCH_DEFAULT_CRASH_DUMP
610 config ARCH_SELECTS_CRASH_DUMP
612 depends on CRASH_DUMP
615 config ARCH_HAS_GENERIC_CRASHKERNEL_RESERVATION
616 def_bool CRASH_RESERVE
619 bool "Relocatable kernel"
622 This builds the kernel as a Position Independent Executable (PIE),
623 which retains all relocation metadata required, so as to relocate
624 the kernel binary at runtime to a different virtual address from
627 config RANDOMIZE_BASE
628 bool "Randomize the address of the kernel (KASLR)"
629 depends on RELOCATABLE
631 Randomizes the physical and virtual address at which the
632 kernel image is loaded, as a security feature that
633 deters exploit attempts relying on knowledge of the location
636 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
640 config RANDOMIZE_BASE_MAX_OFFSET
641 hex "Maximum KASLR offset" if EXPERT
642 depends on RANDOMIZE_BASE
646 When KASLR is active, this provides the maximum offset that will
647 be applied to the kernel image. It should be set according to the
648 amount of physical RAM available in the target system.
650 This is limited by the size of the lower address memory, 256MB.
652 source "kernel/livepatch/Kconfig"
655 bool "Enable paravirtualization code"
656 depends on AS_HAS_LVZ_EXTENSION
658 This changes the kernel so it can modify itself when it is run
659 under a hypervisor, potentially improving performance significantly
660 over full virtualization. However, when run without a hypervisor
661 the kernel is theoretically slower and slightly larger.
663 config PARAVIRT_TIME_ACCOUNTING
664 bool "Paravirtual steal time accounting"
667 Select this option to enable fine granularity task steal time
668 accounting. Time spent executing other tasks in parallel with
669 the current vCPU is discounted from the vCPU power. To account for
670 that, there can be a small performance impact.
672 If in doubt, say N here.
676 config ARCH_SELECT_MEMORY_MODEL
679 config ARCH_FLATMEM_ENABLE
683 config ARCH_SPARSEMEM_ENABLE
685 select SPARSEMEM_VMEMMAP_ENABLE
687 Say Y to support efficient handling of sparse physical memory,
688 for architectures which are either NUMA (Non-Uniform Memory Access)
689 or have huge holes in the physical address space for other reasons.
690 See <file:Documentation/mm/numa.rst> for more.
692 config ARCH_MEMORY_PROBE
694 depends on MEMORY_HOTPLUG
700 config ARCH_MMAP_RND_BITS_MIN
703 config ARCH_MMAP_RND_BITS_MAX
706 config ARCH_SUPPORTS_UPROBES
709 config KASAN_SHADOW_OFFSET
714 menu "Power management options"
716 config ARCH_SUSPEND_POSSIBLE
719 config ARCH_HIBERNATION_POSSIBLE
722 source "kernel/power/Kconfig"
723 source "drivers/acpi/Kconfig"
724 source "drivers/cpufreq/Kconfig"
728 source "arch/loongarch/kvm/Kconfig"