2 use ieee.std_logic_1164.all;
3 use ieee.std_logic_arith.all;
8 architecture behav of tb_shrs is
9 type sl_map_type is array (std_ulogic) of character;
10 constant sl_map : sl_map_type := "UX01ZWLH-";
12 function to_string(v : std_logic_vector) return string
14 alias av : std_logic_vector(1 to v'length) is v;
15 variable res : string (1 to v'length);
17 for i in res'range loop
18 res (i) := sl_map (av (i));
23 signal li : integer := 0;
24 signal ri : integer := 0;
26 signal l3 : std_logic_vector (2 downto 0) := "000";
27 signal r4 : std_logic_vector (3 downto 0) := "0000";
28 signal shl_u3u4u : std_logic_vector (2 downto 0);
29 signal shl_s3u4s : std_logic_vector (2 downto 0);
30 signal shr_u3u4u : std_logic_vector (2 downto 0);
31 signal shr_s3u4s : std_logic_vector (2 downto 0);
38 shl_u3u4u => shl_u3u4u,
39 shl_s3u4s => shl_s3u4s,
40 shr_u3u4u => shr_u3u4u,
41 shr_s3u4s => shr_s3u4s);
47 l3 <= conv_std_logic_vector (i, 3);
49 r4 <= conv_std_logic_vector (j, 4);
52 report "u3u4u: " & integer'image(i) & " shl " & integer'image(j) & " = "
53 & to_string(shl_u3u4u);
54 report "s3u4s: " & integer'image(i) & " shl " & integer'image(j) & " = "
55 & to_string(shl_s3u4s);
56 report "u3u4u: " & integer'image(i) & " shr " & integer'image(j) & " = "
57 & to_string(shr_u3u4u);
58 report "s3u4s: " & integer'image(i) & " shr " & integer'image(j) & " = "
59 & to_string(shr_s3u4s);