arch/arm/plat-omap/include/plat/omap_hwmod.h

   1 /*
   2  * omap_hwmod macros, structures
   3  *
   4  * Copyright (C) 2009 Nokia Corporation
   5  * Paul Walmsley
   6  *
   7  * Created in collaboration with (alphabetical order): Benoît Cousson,
   8  * Kevin Hilman, Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari
   9  * Poussa, Anand Sawant, Santosh Shilimkar, Richard Woodruff
  10  *
  11  * This program is free software; you can redistribute it and/or modify
  12  * it under the terms of the GNU General Public License version 2 as
  13  * published by the Free Software Foundation.
  14  *
  15  * These headers and macros are used to define OMAP on-chip module
  16  * data and their integration with other OMAP modules and Linux.
  17  *
  18  * References:
  19  * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
  20  * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
  21  * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
  22  * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
  23  * - Open Core Protocol Specification 2.2
  24  *
  25  * To do:
  26  * - add interconnect error log structures
  27  * - add pinmuxing
  28  * - init_conn_id_bit (CONNID_BIT_VECTOR)
  29  * - implement default hwmod SMS/SDRC flags?
  30  *
  31  */
  32 #ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD_H
  33 #define __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD_H
  34
  35 #include <linux/kernel.h>
  36 #include <linux/list.h>
  37 #include <linux/ioport.h>
  38 #include <plat/cpu.h>
  39
  40 struct omap_device;
  41
  42 extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type1;
  43 extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type2;
  44
  45 /*
  46  * OCP SYSCONFIG bit shifts/masks TYPE1. These are for IPs compliant
  47  * with the original PRCM protocol defined for OMAP2420
  48  */
  49 #define SYSC_TYPE1_MIDLEMODE_SHIFT      12
  50 #define SYSC_TYPE1_MIDLEMODE_MASK       (0x3 << SYSC_MIDLEMODE_SHIFT)
  51 #define SYSC_TYPE1_CLOCKACTIVITY_SHIFT  8
  52 #define SYSC_TYPE1_CLOCKACTIVITY_MASK   (0x3 << SYSC_CLOCKACTIVITY_SHIFT)
  53 #define SYSC_TYPE1_SIDLEMODE_SHIFT      3
  54 #define SYSC_TYPE1_SIDLEMODE_MASK       (0x3 << SYSC_SIDLEMODE_SHIFT)
  55 #define SYSC_TYPE1_ENAWAKEUP_SHIFT      2
  56 #define SYSC_TYPE1_ENAWAKEUP_MASK       (1 << SYSC_ENAWAKEUP_SHIFT)
  57 #define SYSC_TYPE1_SOFTRESET_SHIFT      1
  58 #define SYSC_TYPE1_SOFTRESET_MASK       (1 << SYSC_SOFTRESET_SHIFT)
  59 #define SYSC_TYPE1_AUTOIDLE_SHIFT       0
  60 #define SYSC_TYPE1_AUTOIDLE_MASK        (1 << SYSC_AUTOIDLE_SHIFT)
  61
  62 /*
  63  * OCP SYSCONFIG bit shifts/masks TYPE2. These are for IPs compliant
  64  * with the new PRCM protocol defined for new OMAP4 IPs.
  65  */
  66 #define SYSC_TYPE2_SOFTRESET_SHIFT      0
  67 #define SYSC_TYPE2_SOFTRESET_MASK       (1 << SYSC_TYPE2_SOFTRESET_SHIFT)
  68 #define SYSC_TYPE2_SIDLEMODE_SHIFT      2
  69 #define SYSC_TYPE2_SIDLEMODE_MASK       (0x3 << SYSC_TYPE2_SIDLEMODE_SHIFT)
  70 #define SYSC_TYPE2_MIDLEMODE_SHIFT      4
  71 #define SYSC_TYPE2_MIDLEMODE_MASK       (0x3 << SYSC_TYPE2_MIDLEMODE_SHIFT)
  72
  73 /* OCP SYSSTATUS bit shifts/masks */
  74 #define SYSS_RESETDONE_SHIFT            0
  75 #define SYSS_RESETDONE_MASK             (1 << SYSS_RESETDONE_SHIFT)
  76
  77 /* Master standby/slave idle mode flags */
  78 #define HWMOD_IDLEMODE_FORCE            (1 << 0)
  79 #define HWMOD_IDLEMODE_NO               (1 << 1)
  80 #define HWMOD_IDLEMODE_SMART            (1 << 2)
  81
  82 /**
  83  * struct omap_hwmod_irq_info - MPU IRQs used by the hwmod
  84  * @name: name of the IRQ channel (module local name)
  85  * @irq_ch: IRQ channel ID
  86  *
  87  * @name should be something short, e.g., "tx" or "rx".  It is for use
  88  * by platform_get_resource_byname().  It is defined locally to the
  89  * hwmod.
  90  */
  91 struct omap_hwmod_irq_info {
  92         const char      *name;
  93         u16             irq;
  94 };
  95
  96 /**
  97  * struct omap_hwmod_dma_info - DMA channels used by the hwmod
  98  * @name: name of the DMA channel (module local name)
  99  * @dma_ch: DMA channel ID
 100  *
 101  * @name should be something short, e.g., "tx" or "rx".  It is for use
 102  * by platform_get_resource_byname().  It is defined locally to the
 103  * hwmod.
 104  */
 105 struct omap_hwmod_dma_info {
 106         const char      *name;
 107         u16             dma_ch;
 108 };
 109
 110 /**
 111  * struct omap_hwmod_opt_clk - optional clocks used by this hwmod
 112  * @role: "sys", "32k", "tv", etc -- for use in clk_get()
 113  * @clk: opt clock: OMAP clock name
 114  * @_clk: pointer to the struct clk (filled in at runtime)
 115  *
 116  * The module's interface clock and main functional clock should not
 117  * be added as optional clocks.
 118  */
 119 struct omap_hwmod_opt_clk {
 120         const char      *role;
 121         const char      *clk;
 122         struct clk      *_clk;
 123 };
 124
 125
 126 /* omap_hwmod_omap2_firewall.flags bits */
 127 #define OMAP_FIREWALL_L3                (1 << 0)
 128 #define OMAP_FIREWALL_L4                (1 << 1)
 129
 130 /**
 131  * struct omap_hwmod_omap2_firewall - OMAP2/3 device firewall data
 132  * @l3_perm_bit: bit shift for L3_PM_*_PERMISSION_*
 133  * @l4_fw_region: L4 firewall region ID
 134  * @l4_prot_group: L4 protection group ID
 135  * @flags: (see omap_hwmod_omap2_firewall.flags macros above)
 136  */
 137 struct omap_hwmod_omap2_firewall {
 138         u8 l3_perm_bit;
 139         u8 l4_fw_region;
 140         u8 l4_prot_group;
 141         u8 flags;
 142 };
 143
 144
 145 /*
 146  * omap_hwmod_addr_space.flags bits
 147  *
 148  * ADDR_MAP_ON_INIT: Map this address space during omap_hwmod init.
 149  * ADDR_TYPE_RT: Address space contains module register target data.
 150  */
 151 #define ADDR_MAP_ON_INIT        (1 << 0)
 152 #define ADDR_TYPE_RT            (1 << 1)
 153
 154 /**
 155  * struct omap_hwmod_addr_space - MPU address space handled by the hwmod
 156  * @pa_start: starting physical address
 157  * @pa_end: ending physical address
 158  * @flags: (see omap_hwmod_addr_space.flags macros above)
 159  *
 160  * Address space doesn't necessarily follow physical interconnect
 161  * structure.  GPMC is one example.
 162  */
 163 struct omap_hwmod_addr_space {
 164         u32 pa_start;
 165         u32 pa_end;
 166         u8 flags;
 167 };
 168
 169
 170 /*
 171  * omap_hwmod_ocp_if.user bits: these indicate the initiators that use this
 172  * interface to interact with the hwmod.  Used to add sleep dependencies
 173  * when the module is enabled or disabled.
 174  */
 175 #define OCP_USER_MPU                    (1 << 0)
 176 #define OCP_USER_SDMA                   (1 << 1)
 177
 178 /* omap_hwmod_ocp_if.flags bits */
 179 #define OCPIF_HAS_IDLEST                (1 << 0)
 180 #define OCPIF_SWSUP_IDLE                (1 << 1)
 181 #define OCPIF_CAN_BURST                 (1 << 2)
 182
 183 /**
 184  * struct omap_hwmod_ocp_if - OCP interface data
 185  * @master: struct omap_hwmod that initiates OCP transactions on this link
 186  * @slave: struct omap_hwmod that responds to OCP transactions on this link
 187  * @addr: address space associated with this link
 188  * @clk: interface clock: OMAP clock name
 189  * @_clk: pointer to the interface struct clk (filled in at runtime)
 190  * @fw: interface firewall data
 191  * @addr_cnt: ARRAY_SIZE(@addr)
 192  * @width: OCP data width
 193  * @thread_cnt: number of threads
 194  * @max_burst_len: maximum burst length in @width sized words (0 if unlimited)
 195  * @user: initiators using this interface (see OCP_USER_* macros above)
 196  * @flags: OCP interface flags (see OCPIF_* macros above)
 197  *
 198  * It may also be useful to add a tag_cnt field for OCP2.x devices.
 199  *
 200  * Parameter names beginning with an underscore are managed internally by
 201  * the omap_hwmod code and should not be set during initialization.
 202  */
 203 struct omap_hwmod_ocp_if {
 204         struct omap_hwmod               *master;
 205         struct omap_hwmod               *slave;
 206         struct omap_hwmod_addr_space    *addr;
 207         const char                      *clk;
 208         struct clk                      *_clk;
 209         union {
 210                 struct omap_hwmod_omap2_firewall omap2;
 211         }                               fw;
 212         u8                              addr_cnt;
 213         u8                              width;
 214         u8                              thread_cnt;
 215         u8                              max_burst_len;
 216         u8                              user;
 217         u8                              flags;
 218 };
 219
 220
 221 /* Macros for use in struct omap_hwmod_sysconfig */
 222
 223 /* Flags for use in omap_hwmod_sysconfig.idlemodes */
 224 #define MASTER_STANDBY_SHIFT    2
 225 #define SLAVE_IDLE_SHIFT        0
 226 #define SIDLE_FORCE             (HWMOD_IDLEMODE_FORCE << SLAVE_IDLE_SHIFT)
 227 #define SIDLE_NO                (HWMOD_IDLEMODE_NO << SLAVE_IDLE_SHIFT)
 228 #define SIDLE_SMART             (HWMOD_IDLEMODE_SMART << SLAVE_IDLE_SHIFT)
 229 #define MSTANDBY_FORCE          (HWMOD_IDLEMODE_FORCE << MASTER_STANDBY_SHIFT)
 230 #define MSTANDBY_NO             (HWMOD_IDLEMODE_NO << MASTER_STANDBY_SHIFT)
 231 #define MSTANDBY_SMART          (HWMOD_IDLEMODE_SMART << MASTER_STANDBY_SHIFT)
 232
 233 /* omap_hwmod_sysconfig.sysc_flags capability flags */
 234 #define SYSC_HAS_AUTOIDLE       (1 << 0)
 235 #define SYSC_HAS_SOFTRESET      (1 << 1)
 236 #define SYSC_HAS_ENAWAKEUP      (1 << 2)
 237 #define SYSC_HAS_EMUFREE        (1 << 3)
 238 #define SYSC_HAS_CLOCKACTIVITY  (1 << 4)
 239 #define SYSC_HAS_SIDLEMODE      (1 << 5)
 240 #define SYSC_HAS_MIDLEMODE      (1 << 6)
 241 #define SYSS_MISSING            (1 << 7)
 242 #define SYSC_NO_CACHE           (1 << 8)  /* XXX SW flag, belongs elsewhere */
 243
 244 /* omap_hwmod_sysconfig.clockact flags */
 245 #define CLOCKACT_TEST_BOTH      0x0
 246 #define CLOCKACT_TEST_MAIN      0x1
 247 #define CLOCKACT_TEST_ICLK      0x2
 248 #define CLOCKACT_TEST_NONE      0x3
 249
 250 /**
 251  * struct omap_hwmod_sysc_fields - hwmod OCP_SYSCONFIG register field offsets.
 252  * @midle_shift: Offset of the midle bit
 253  * @clkact_shift: Offset of the clockactivity bit
 254  * @sidle_shift: Offset of the sidle bit
 255  * @enwkup_shift: Offset of the enawakeup bit
 256  * @srst_shift: Offset of the softreset bit
 257  * @autoidle_shift: Offset of the autoidle bit
 258  */
 259 struct omap_hwmod_sysc_fields {
 260         u8 midle_shift;
 261         u8 clkact_shift;
 262         u8 sidle_shift;
 263         u8 enwkup_shift;
 264         u8 srst_shift;
 265         u8 autoidle_shift;
 266 };
 267
 268 /**
 269  * struct omap_hwmod_class_sysconfig - hwmod class OCP_SYS* data
 270  * @rev_offs: IP block revision register offset (from module base addr)
 271  * @sysc_offs: OCP_SYSCONFIG register offset (from module base addr)
 272  * @syss_offs: OCP_SYSSTATUS register offset (from module base addr)
 273  * @idlemodes: One or more of {SIDLE,MSTANDBY}_{OFF,FORCE,SMART}
 274  * @sysc_flags: SYS{C,S}_HAS* flags indicating SYSCONFIG bits supported
 275  * @clockact: the default value of the module CLOCKACTIVITY bits
 276  *
 277  * @clockact describes to the module which clocks are likely to be
 278  * disabled when the PRCM issues its idle request to the module.  Some
 279  * modules have separate clockdomains for the interface clock and main
 280  * functional clock, and can check whether they should acknowledge the
 281  * idle request based on the internal module functionality that has
 282  * been associated with the clocks marked in @clockact.  This field is
 283  * only used if HWMOD_SET_DEFAULT_CLOCKACT is set (see below)
 284  *
 285  * @sysc_fields: structure containing the offset positions of various bits in
 286  * SYSCONFIG register. This can be populated using omap_hwmod_sysc_type1 or
 287  * omap_hwmod_sysc_type2 defined in omap_hwmod_common_data.c depending on
 288  * whether the device ip is compliant with the original PRCM protocol
 289  * defined for OMAP2420 or the new PRCM protocol for new OMAP4 IPs.
 290  * If the device follows a different scheme for the sysconfig register ,
 291  * then this field has to be populated with the correct offset structure.
 292  */
 293 struct omap_hwmod_class_sysconfig {
 294         u16 rev_offs;
 295         u16 sysc_offs;
 296         u16 syss_offs;
 297         u8 idlemodes;
 298         u8 sysc_flags;
 299         u8 clockact;
 300         struct omap_hwmod_sysc_fields *sysc_fields;
 301 };
 302
 303 /**
 304  * struct omap_hwmod_omap2_prcm - OMAP2/3-specific PRCM data
 305  * @module_offs: PRCM submodule offset from the start of the PRM/CM
 306  * @prcm_reg_id: PRCM register ID (e.g., 3 for CM_AUTOIDLE3)
 307  * @module_bit: register bit shift for AUTOIDLE, WKST, WKEN, GRPSEL regs
 308  * @idlest_reg_id: IDLEST register ID (e.g., 3 for CM_IDLEST3)
 309  * @idlest_idle_bit: register bit shift for CM_IDLEST slave idle bit
 310  * @idlest_stdby_bit: register bit shift for CM_IDLEST master standby bit
 311  *
 312  * @prcm_reg_id and @module_bit are specific to the AUTOIDLE, WKST,
 313  * WKEN, GRPSEL registers.  In an ideal world, no extra information
 314  * would be needed for IDLEST information, but alas, there are some
 315  * exceptions, so @idlest_reg_id, @idlest_idle_bit, @idlest_stdby_bit
 316  * are needed for the IDLEST registers (c.f. 2430 I2CHS, 3430 USBHOST)
 317  */
 318 struct omap_hwmod_omap2_prcm {
 319         s16 module_offs;
 320         u8 prcm_reg_id;
 321         u8 module_bit;
 322         u8 idlest_reg_id;
 323         u8 idlest_idle_bit;
 324         u8 idlest_stdby_bit;
 325 };
 326
 327
 328 /**
 329  * struct omap_hwmod_omap4_prcm - OMAP4-specific PRCM data
 330  * @module_offs: PRCM submodule offset from the start of the PRM/CM1/CM2
 331  * @device_offs: device register offset from @module_offs
 332  * @submodule_wkdep_bit: bit shift of the WKDEP range
 333  */
 334 struct omap_hwmod_omap4_prcm {
 335         u32 module_offs;
 336         u16 device_offs;
 337         u8 submodule_wkdep_bit;
 338 };
 339
 340
 341 /*
 342  * omap_hwmod.flags definitions
 343  *
 344  * HWMOD_SWSUP_SIDLE: omap_hwmod code should manually bring module in and out
 345  *     of idle, rather than relying on module smart-idle
 346  * HWMOD_SWSUP_MSTDBY: omap_hwmod code should manually bring module in and out
 347  *     of standby, rather than relying on module smart-standby
 348  * HWMOD_INIT_NO_RESET: don't reset this module at boot - important for
 349  *     SDRAM controller, etc.
 350  * HWMOD_INIT_NO_IDLE: don't idle this module at boot - important for SDRAM
 351  *     controller, etc.
 352  * HWMOD_NO_AUTOIDLE: disable module autoidle (OCP_SYSCONFIG.AUTOIDLE)
 353  *     when module is enabled, rather than the default, which is to
 354  *     enable autoidle
 355  * HWMOD_SET_DEFAULT_CLOCKACT: program CLOCKACTIVITY bits at startup
 356  */
 357 #define HWMOD_SWSUP_SIDLE                       (1 << 0)
 358 #define HWMOD_SWSUP_MSTANDBY                    (1 << 1)
 359 #define HWMOD_INIT_NO_RESET                     (1 << 2)
 360 #define HWMOD_INIT_NO_IDLE                      (1 << 3)
 361 #define HWMOD_NO_OCP_AUTOIDLE                   (1 << 4)
 362 #define HWMOD_SET_DEFAULT_CLOCKACT              (1 << 5)
 363
 364 /*
 365  * omap_hwmod._int_flags definitions
 366  * These are for internal use only and are managed by the omap_hwmod code.
 367  *
 368  * _HWMOD_NO_MPU_PORT: no path exists for the MPU to write to this module
 369  * _HWMOD_WAKEUP_ENABLED: set when the omap_hwmod code has enabled ENAWAKEUP
 370  * _HWMOD_SYSCONFIG_LOADED: set when the OCP_SYSCONFIG value has been cached
 371  */
 372 #define _HWMOD_NO_MPU_PORT                      (1 << 0)
 373 #define _HWMOD_WAKEUP_ENABLED                   (1 << 1)
 374 #define _HWMOD_SYSCONFIG_LOADED                 (1 << 2)
 375
 376 /*
 377  * omap_hwmod._state definitions
 378  *
 379  * INITIALIZED: reset (optionally), initialized, enabled, disabled
 380  *              (optionally)
 381  *
 382  *
 383  */
 384 #define _HWMOD_STATE_UNKNOWN                    0
 385 #define _HWMOD_STATE_REGISTERED                 1
 386 #define _HWMOD_STATE_CLKS_INITED                2
 387 #define _HWMOD_STATE_INITIALIZED                3
 388 #define _HWMOD_STATE_ENABLED                    4
 389 #define _HWMOD_STATE_IDLE                       5
 390 #define _HWMOD_STATE_DISABLED                   6
 391
 392 /**
 393  * struct omap_hwmod_class - the type of an IP block
 394  * @name: name of the hwmod_class
 395  * @sysc: device SYSCONFIG/SYSSTATUS register data
 396  * @rev: revision of the IP class
 397  *
 398  * Represent the class of a OMAP hardware "modules" (e.g. timer,
 399  * smartreflex, gpio, uart...)
 400  */
 401 struct omap_hwmod_class {
 402         const char                              *name;
 403         struct omap_hwmod_class_sysconfig       *sysc;
 404         u32                                     rev;
 405 };
 406
 407 /**
 408  * struct omap_hwmod - integration data for OMAP hardware "modules" (IP blocks)
 409  * @name: name of the hwmod
 410  * @class: struct omap_hwmod_class * to the class of this hwmod
 411  * @od: struct omap_device currently associated with this hwmod (internal use)
 412  * @mpu_irqs: ptr to an array of MPU IRQs (see also mpu_irqs_cnt)
 413  * @sdma_chs: ptr to an array of SDMA channel IDs (see also sdma_chs_cnt)
 414  * @prcm: PRCM data pertaining to this hwmod
 415  * @main_clk: main clock: OMAP clock name
 416  * @_clk: pointer to the main struct clk (filled in at runtime)
 417  * @opt_clks: other device clocks that drivers can request (0..*)
 418  * @masters: ptr to array of OCP ifs that this hwmod can initiate on
 419  * @slaves: ptr to array of OCP ifs that this hwmod can respond on
 420  * @dev_attr: arbitrary device attributes that can be passed to the driver
 421  * @_sysc_cache: internal-use hwmod flags
 422  * @_rt_va: cached register target start address (internal use)
 423  * @_mpu_port_index: cached MPU register target slave ID (internal use)
 424  * @msuspendmux_reg_id: CONTROL_MSUSPENDMUX register ID (1-6)
 425  * @msuspendmux_shift: CONTROL_MSUSPENDMUX register bit shift
 426  * @mpu_irqs_cnt: number of @mpu_irqs
 427  * @sdma_chs_cnt: number of @sdma_chs
 428  * @opt_clks_cnt: number of @opt_clks
 429  * @master_cnt: number of @master entries
 430  * @slaves_cnt: number of @slave entries
 431  * @response_lat: device OCP response latency (in interface clock cycles)
 432  * @_int_flags: internal-use hwmod flags
 433  * @_state: internal-use hwmod state
 434  * @flags: hwmod flags (documented below)
 435  * @omap_chip: OMAP chips this hwmod is present on
 436  * @node: list node for hwmod list (internal use)
 437  *
 438  * @main_clk refers to this module's "main clock," which for our
 439  * purposes is defined as "the functional clock needed for register
 440  * accesses to complete."  Modules may not have a main clock if the
 441  * interface clock also serves as a main clock.
 442  *
 443  * Parameter names beginning with an underscore are managed internally by
 444  * the omap_hwmod code and should not be set during initialization.
 445  */
 446 struct omap_hwmod {
 447         const char                      *name;
 448         struct omap_hwmod_class         *class;
 449         struct omap_device              *od;
 450         struct omap_hwmod_irq_info      *mpu_irqs;
 451         struct omap_hwmod_dma_info      *sdma_chs;
 452         union {
 453                 struct omap_hwmod_omap2_prcm omap2;
 454                 struct omap_hwmod_omap4_prcm omap4;
 455         }                               prcm;
 456         const char                      *main_clk;
 457         struct clk                      *_clk;
 458         struct omap_hwmod_opt_clk       *opt_clks;
 459         struct omap_hwmod_ocp_if        **masters; /* connect to *_IA */
 460         struct omap_hwmod_ocp_if        **slaves;  /* connect to *_TA */
 461         void                            *dev_attr;
 462         u32                             _sysc_cache;
 463         void __iomem                    *_rt_va;
 464         struct list_head                node;
 465         u16                             flags;
 466         u8                              _mpu_port_index;
 467         u8                              msuspendmux_reg_id;
 468         u8                              msuspendmux_shift;
 469         u8                              response_lat;
 470         u8                              mpu_irqs_cnt;
 471         u8                              sdma_chs_cnt;
 472         u8                              opt_clks_cnt;
 473         u8                              masters_cnt;
 474         u8                              slaves_cnt;
 475         u8                              hwmods_cnt;
 476         u8                              _int_flags;
 477         u8                              _state;
 478         const struct omap_chip_id       omap_chip;
 479 };
 480
 481 int omap_hwmod_init(struct omap_hwmod **ohs);
 482 int omap_hwmod_register(struct omap_hwmod *oh);
 483 int omap_hwmod_unregister(struct omap_hwmod *oh);
 484 struct omap_hwmod *omap_hwmod_lookup(const char *name);
 485 int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh));
 486 int omap_hwmod_late_init(void);
 487
 488 int omap_hwmod_enable(struct omap_hwmod *oh);
 489 int omap_hwmod_idle(struct omap_hwmod *oh);
 490 int omap_hwmod_shutdown(struct omap_hwmod *oh);
 491
 492 int omap_hwmod_enable_clocks(struct omap_hwmod *oh);
 493 int omap_hwmod_disable_clocks(struct omap_hwmod *oh);
 494
 495 int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode);
 496
 497 int omap_hwmod_reset(struct omap_hwmod *oh);
 498 void omap_hwmod_ocp_barrier(struct omap_hwmod *oh);
 499
 500 void omap_hwmod_writel(u32 v, struct omap_hwmod *oh, u16 reg_offs);
 501 u32 omap_hwmod_readl(struct omap_hwmod *oh, u16 reg_offs);
 502
 503 int omap_hwmod_count_resources(struct omap_hwmod *oh);
 504 int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res);
 505
 506 struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh);
 507
 508 int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
 509                                  struct omap_hwmod *init_oh);
 510 int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
 511                                  struct omap_hwmod *init_oh);
 512
 513 int omap_hwmod_set_clockact_both(struct omap_hwmod *oh);
 514 int omap_hwmod_set_clockact_main(struct omap_hwmod *oh);
 515 int omap_hwmod_set_clockact_iclk(struct omap_hwmod *oh);
 516 int omap_hwmod_set_clockact_none(struct omap_hwmod *oh);
 517
 518 int omap_hwmod_enable_wakeup(struct omap_hwmod *oh);
 519 int omap_hwmod_disable_wakeup(struct omap_hwmod *oh);
 520
 521 int omap_hwmod_for_each_by_class(const char *classname,
 522                                  int (*fn)(struct omap_hwmod *oh,
 523                                            void *user),
 524                                  void *user);
 525
 526 /*
 527  * Chip variant-specific hwmod init routines - XXX should be converted
 528  * to use initcalls once the initial boot ordering is straightened out
 529  */
 530 extern int omap2420_hwmod_init(void);
 531 extern int omap2430_hwmod_init(void);
 532 extern int omap3xxx_hwmod_init(void);
 533
 534 #endif