4 * TI OMAP3 ISP - CCDC module
6 * Copyright (C) 2009-2010 Nokia Corporation
7 * Copyright (C) 2009 Texas Instruments, Inc.
9 * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
10 * Sakari Ailus <sakari.ailus@iki.fi>
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
27 #include <linux/module.h>
28 #include <linux/uaccess.h>
29 #include <linux/delay.h>
30 #include <linux/device.h>
31 #include <linux/dma-mapping.h>
33 #include <linux/sched.h>
34 #include <media/v4l2-event.h>
40 static struct v4l2_mbus_framefmt
*
41 __ccdc_get_format(struct isp_ccdc_device
*ccdc
, struct v4l2_subdev_fh
*fh
,
42 unsigned int pad
, enum v4l2_subdev_format_whence which
);
44 static const unsigned int ccdc_fmts
[] = {
46 V4L2_MBUS_FMT_Y10_1X10
,
47 V4L2_MBUS_FMT_Y12_1X12
,
48 V4L2_MBUS_FMT_SGRBG8_1X8
,
49 V4L2_MBUS_FMT_SRGGB8_1X8
,
50 V4L2_MBUS_FMT_SBGGR8_1X8
,
51 V4L2_MBUS_FMT_SGBRG8_1X8
,
52 V4L2_MBUS_FMT_SGRBG10_1X10
,
53 V4L2_MBUS_FMT_SRGGB10_1X10
,
54 V4L2_MBUS_FMT_SBGGR10_1X10
,
55 V4L2_MBUS_FMT_SGBRG10_1X10
,
56 V4L2_MBUS_FMT_SGRBG12_1X12
,
57 V4L2_MBUS_FMT_SRGGB12_1X12
,
58 V4L2_MBUS_FMT_SBGGR12_1X12
,
59 V4L2_MBUS_FMT_SGBRG12_1X12
,
63 * ccdc_print_status - Print current CCDC Module register values.
64 * @ccdc: Pointer to ISP CCDC device.
66 * Also prints other debug information stored in the CCDC module.
68 #define CCDC_PRINT_REGISTER(isp, name)\
69 dev_dbg(isp->dev, "###CCDC " #name "=0x%08x\n", \
70 isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_##name))
72 static void ccdc_print_status(struct isp_ccdc_device
*ccdc
)
74 struct isp_device
*isp
= to_isp_device(ccdc
);
76 dev_dbg(isp
->dev
, "-------------CCDC Register dump-------------\n");
78 CCDC_PRINT_REGISTER(isp
, PCR
);
79 CCDC_PRINT_REGISTER(isp
, SYN_MODE
);
80 CCDC_PRINT_REGISTER(isp
, HD_VD_WID
);
81 CCDC_PRINT_REGISTER(isp
, PIX_LINES
);
82 CCDC_PRINT_REGISTER(isp
, HORZ_INFO
);
83 CCDC_PRINT_REGISTER(isp
, VERT_START
);
84 CCDC_PRINT_REGISTER(isp
, VERT_LINES
);
85 CCDC_PRINT_REGISTER(isp
, CULLING
);
86 CCDC_PRINT_REGISTER(isp
, HSIZE_OFF
);
87 CCDC_PRINT_REGISTER(isp
, SDOFST
);
88 CCDC_PRINT_REGISTER(isp
, SDR_ADDR
);
89 CCDC_PRINT_REGISTER(isp
, CLAMP
);
90 CCDC_PRINT_REGISTER(isp
, DCSUB
);
91 CCDC_PRINT_REGISTER(isp
, COLPTN
);
92 CCDC_PRINT_REGISTER(isp
, BLKCMP
);
93 CCDC_PRINT_REGISTER(isp
, FPC
);
94 CCDC_PRINT_REGISTER(isp
, FPC_ADDR
);
95 CCDC_PRINT_REGISTER(isp
, VDINT
);
96 CCDC_PRINT_REGISTER(isp
, ALAW
);
97 CCDC_PRINT_REGISTER(isp
, REC656IF
);
98 CCDC_PRINT_REGISTER(isp
, CFG
);
99 CCDC_PRINT_REGISTER(isp
, FMTCFG
);
100 CCDC_PRINT_REGISTER(isp
, FMT_HORZ
);
101 CCDC_PRINT_REGISTER(isp
, FMT_VERT
);
102 CCDC_PRINT_REGISTER(isp
, PRGEVEN0
);
103 CCDC_PRINT_REGISTER(isp
, PRGEVEN1
);
104 CCDC_PRINT_REGISTER(isp
, PRGODD0
);
105 CCDC_PRINT_REGISTER(isp
, PRGODD1
);
106 CCDC_PRINT_REGISTER(isp
, VP_OUT
);
107 CCDC_PRINT_REGISTER(isp
, LSC_CONFIG
);
108 CCDC_PRINT_REGISTER(isp
, LSC_INITIAL
);
109 CCDC_PRINT_REGISTER(isp
, LSC_TABLE_BASE
);
110 CCDC_PRINT_REGISTER(isp
, LSC_TABLE_OFFSET
);
112 dev_dbg(isp
->dev
, "--------------------------------------------\n");
116 * omap3isp_ccdc_busy - Get busy state of the CCDC.
117 * @ccdc: Pointer to ISP CCDC device.
119 int omap3isp_ccdc_busy(struct isp_ccdc_device
*ccdc
)
121 struct isp_device
*isp
= to_isp_device(ccdc
);
123 return isp_reg_readl(isp
, OMAP3_ISP_IOMEM_CCDC
, ISPCCDC_PCR
) &
127 /* -----------------------------------------------------------------------------
128 * Lens Shading Compensation
132 * ccdc_lsc_validate_config - Check that LSC configuration is valid.
133 * @ccdc: Pointer to ISP CCDC device.
134 * @lsc_cfg: the LSC configuration to check.
136 * Returns 0 if the LSC configuration is valid, or -EINVAL if invalid.
138 static int ccdc_lsc_validate_config(struct isp_ccdc_device
*ccdc
,
139 struct omap3isp_ccdc_lsc_config
*lsc_cfg
)
141 struct isp_device
*isp
= to_isp_device(ccdc
);
142 struct v4l2_mbus_framefmt
*format
;
143 unsigned int paxel_width
, paxel_height
;
144 unsigned int paxel_shift_x
, paxel_shift_y
;
145 unsigned int min_width
, min_height
, min_size
;
146 unsigned int input_width
, input_height
;
148 paxel_shift_x
= lsc_cfg
->gain_mode_m
;
149 paxel_shift_y
= lsc_cfg
->gain_mode_n
;
151 if ((paxel_shift_x
< 2) || (paxel_shift_x
> 6) ||
152 (paxel_shift_y
< 2) || (paxel_shift_y
> 6)) {
153 dev_dbg(isp
->dev
, "CCDC: LSC: Invalid paxel size\n");
157 if (lsc_cfg
->offset
& 3) {
158 dev_dbg(isp
->dev
, "CCDC: LSC: Offset must be a multiple of "
163 if ((lsc_cfg
->initial_x
& 1) || (lsc_cfg
->initial_y
& 1)) {
164 dev_dbg(isp
->dev
, "CCDC: LSC: initial_x and y must be even\n");
168 format
= __ccdc_get_format(ccdc
, NULL
, CCDC_PAD_SINK
,
169 V4L2_SUBDEV_FORMAT_ACTIVE
);
170 input_width
= format
->width
;
171 input_height
= format
->height
;
173 /* Calculate minimum bytesize for validation */
174 paxel_width
= 1 << paxel_shift_x
;
175 min_width
= ((input_width
+ lsc_cfg
->initial_x
+ paxel_width
- 1)
176 >> paxel_shift_x
) + 1;
178 paxel_height
= 1 << paxel_shift_y
;
179 min_height
= ((input_height
+ lsc_cfg
->initial_y
+ paxel_height
- 1)
180 >> paxel_shift_y
) + 1;
182 min_size
= 4 * min_width
* min_height
;
183 if (min_size
> lsc_cfg
->size
) {
184 dev_dbg(isp
->dev
, "CCDC: LSC: too small table\n");
187 if (lsc_cfg
->offset
< (min_width
* 4)) {
188 dev_dbg(isp
->dev
, "CCDC: LSC: Offset is too small\n");
191 if ((lsc_cfg
->size
/ lsc_cfg
->offset
) < min_height
) {
192 dev_dbg(isp
->dev
, "CCDC: LSC: Wrong size/offset combination\n");
199 * ccdc_lsc_program_table - Program Lens Shading Compensation table address.
200 * @ccdc: Pointer to ISP CCDC device.
202 static void ccdc_lsc_program_table(struct isp_ccdc_device
*ccdc
, u32 addr
)
204 isp_reg_writel(to_isp_device(ccdc
), addr
,
205 OMAP3_ISP_IOMEM_CCDC
, ISPCCDC_LSC_TABLE_BASE
);
209 * ccdc_lsc_setup_regs - Configures the lens shading compensation module
210 * @ccdc: Pointer to ISP CCDC device.
212 static void ccdc_lsc_setup_regs(struct isp_ccdc_device
*ccdc
,
213 struct omap3isp_ccdc_lsc_config
*cfg
)
215 struct isp_device
*isp
= to_isp_device(ccdc
);
218 isp_reg_writel(isp
, cfg
->offset
, OMAP3_ISP_IOMEM_CCDC
,
219 ISPCCDC_LSC_TABLE_OFFSET
);
222 reg
|= cfg
->gain_mode_n
<< ISPCCDC_LSC_GAIN_MODE_N_SHIFT
;
223 reg
|= cfg
->gain_mode_m
<< ISPCCDC_LSC_GAIN_MODE_M_SHIFT
;
224 reg
|= cfg
->gain_format
<< ISPCCDC_LSC_GAIN_FORMAT_SHIFT
;
225 isp_reg_writel(isp
, reg
, OMAP3_ISP_IOMEM_CCDC
, ISPCCDC_LSC_CONFIG
);
228 reg
&= ~ISPCCDC_LSC_INITIAL_X_MASK
;
229 reg
|= cfg
->initial_x
<< ISPCCDC_LSC_INITIAL_X_SHIFT
;
230 reg
&= ~ISPCCDC_LSC_INITIAL_Y_MASK
;
231 reg
|= cfg
->initial_y
<< ISPCCDC_LSC_INITIAL_Y_SHIFT
;
232 isp_reg_writel(isp
, reg
, OMAP3_ISP_IOMEM_CCDC
,
233 ISPCCDC_LSC_INITIAL
);
236 static int ccdc_lsc_wait_prefetch(struct isp_ccdc_device
*ccdc
)
238 struct isp_device
*isp
= to_isp_device(ccdc
);
241 isp_reg_writel(isp
, IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ
,
242 OMAP3_ISP_IOMEM_MAIN
, ISP_IRQ0STATUS
);
245 for (wait
= 0; wait
< 1000; wait
++) {
246 if (isp_reg_readl(isp
, OMAP3_ISP_IOMEM_MAIN
, ISP_IRQ0STATUS
) &
247 IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ
) {
248 isp_reg_writel(isp
, IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ
,
249 OMAP3_ISP_IOMEM_MAIN
, ISP_IRQ0STATUS
);
261 * __ccdc_lsc_enable - Enables/Disables the Lens Shading Compensation module.
262 * @ccdc: Pointer to ISP CCDC device.
263 * @enable: 0 Disables LSC, 1 Enables LSC.
265 static int __ccdc_lsc_enable(struct isp_ccdc_device
*ccdc
, int enable
)
267 struct isp_device
*isp
= to_isp_device(ccdc
);
268 const struct v4l2_mbus_framefmt
*format
=
269 __ccdc_get_format(ccdc
, NULL
, CCDC_PAD_SINK
,
270 V4L2_SUBDEV_FORMAT_ACTIVE
);
272 if ((format
->code
!= V4L2_MBUS_FMT_SGRBG10_1X10
) &&
273 (format
->code
!= V4L2_MBUS_FMT_SRGGB10_1X10
) &&
274 (format
->code
!= V4L2_MBUS_FMT_SBGGR10_1X10
) &&
275 (format
->code
!= V4L2_MBUS_FMT_SGBRG10_1X10
))
279 omap3isp_sbl_enable(isp
, OMAP3_ISP_SBL_CCDC_LSC_READ
);
281 isp_reg_clr_set(isp
, OMAP3_ISP_IOMEM_CCDC
, ISPCCDC_LSC_CONFIG
,
282 ISPCCDC_LSC_ENABLE
, enable
? ISPCCDC_LSC_ENABLE
: 0);
285 if (ccdc_lsc_wait_prefetch(ccdc
) < 0) {
286 isp_reg_clr(isp
, OMAP3_ISP_IOMEM_CCDC
,
287 ISPCCDC_LSC_CONFIG
, ISPCCDC_LSC_ENABLE
);
288 ccdc
->lsc
.state
= LSC_STATE_STOPPED
;
289 dev_warn(to_device(ccdc
), "LSC prefecth timeout\n");
292 ccdc
->lsc
.state
= LSC_STATE_RUNNING
;
294 ccdc
->lsc
.state
= LSC_STATE_STOPPING
;
300 static int ccdc_lsc_busy(struct isp_ccdc_device
*ccdc
)
302 struct isp_device
*isp
= to_isp_device(ccdc
);
304 return isp_reg_readl(isp
, OMAP3_ISP_IOMEM_CCDC
, ISPCCDC_LSC_CONFIG
) &
308 /* __ccdc_lsc_configure - Apply a new configuration to the LSC engine
309 * @ccdc: Pointer to ISP CCDC device
310 * @req: New configuration request
312 * context: in_interrupt()
314 static int __ccdc_lsc_configure(struct isp_ccdc_device
*ccdc
,
315 struct ispccdc_lsc_config_req
*req
)
320 if (ccdc_lsc_validate_config(ccdc
, &req
->config
) < 0) {
321 dev_dbg(to_device(ccdc
), "Discard LSC configuration\n");
325 if (ccdc_lsc_busy(ccdc
))
328 ccdc_lsc_setup_regs(ccdc
, &req
->config
);
329 ccdc_lsc_program_table(ccdc
, req
->table
);
334 * ccdc_lsc_error_handler - Handle LSC prefetch error scenario.
335 * @ccdc: Pointer to ISP CCDC device.
337 * Disables LSC, and defers enablement to shadow registers update time.
339 static void ccdc_lsc_error_handler(struct isp_ccdc_device
*ccdc
)
341 struct isp_device
*isp
= to_isp_device(ccdc
);
343 * From OMAP3 TRM: When this event is pending, the module
344 * goes into transparent mode (output =input). Normal
345 * operation can be resumed at the start of the next frame
347 * 1) Clearing this event
348 * 2) Disabling the LSC module
351 isp_reg_clr(isp
, OMAP3_ISP_IOMEM_CCDC
, ISPCCDC_LSC_CONFIG
,
353 ccdc
->lsc
.state
= LSC_STATE_STOPPED
;
356 static void ccdc_lsc_free_request(struct isp_ccdc_device
*ccdc
,
357 struct ispccdc_lsc_config_req
*req
)
359 struct isp_device
*isp
= to_isp_device(ccdc
);
365 dma_unmap_sg(isp
->dev
, req
->iovm
->sgt
->sgl
,
366 req
->iovm
->sgt
->nents
, DMA_TO_DEVICE
);
368 iommu_vfree(isp
->iommu
, req
->table
);
372 static void ccdc_lsc_free_queue(struct isp_ccdc_device
*ccdc
,
373 struct list_head
*queue
)
375 struct ispccdc_lsc_config_req
*req
, *n
;
378 spin_lock_irqsave(&ccdc
->lsc
.req_lock
, flags
);
379 list_for_each_entry_safe(req
, n
, queue
, list
) {
380 list_del(&req
->list
);
381 spin_unlock_irqrestore(&ccdc
->lsc
.req_lock
, flags
);
382 ccdc_lsc_free_request(ccdc
, req
);
383 spin_lock_irqsave(&ccdc
->lsc
.req_lock
, flags
);
385 spin_unlock_irqrestore(&ccdc
->lsc
.req_lock
, flags
);
388 static void ccdc_lsc_free_table_work(struct work_struct
*work
)
390 struct isp_ccdc_device
*ccdc
;
391 struct ispccdc_lsc
*lsc
;
393 lsc
= container_of(work
, struct ispccdc_lsc
, table_work
);
394 ccdc
= container_of(lsc
, struct isp_ccdc_device
, lsc
);
396 ccdc_lsc_free_queue(ccdc
, &lsc
->free_queue
);
400 * ccdc_lsc_config - Configure the LSC module from a userspace request
402 * Store the request LSC configuration in the LSC engine request pointer. The
403 * configuration will be applied to the hardware when the CCDC will be enabled,
404 * or at the next LSC interrupt if the CCDC is already running.
406 static int ccdc_lsc_config(struct isp_ccdc_device
*ccdc
,
407 struct omap3isp_ccdc_update_config
*config
)
409 struct isp_device
*isp
= to_isp_device(ccdc
);
410 struct ispccdc_lsc_config_req
*req
;
416 update
= config
->update
&
417 (OMAP3ISP_CCDC_CONFIG_LSC
| OMAP3ISP_CCDC_TBL_LSC
);
421 if (update
!= (OMAP3ISP_CCDC_CONFIG_LSC
| OMAP3ISP_CCDC_TBL_LSC
)) {
422 dev_dbg(to_device(ccdc
), "%s: Both LSC configuration and table "
423 "need to be supplied\n", __func__
);
427 req
= kzalloc(sizeof(*req
), GFP_KERNEL
);
431 if (config
->flag
& OMAP3ISP_CCDC_CONFIG_LSC
) {
432 if (copy_from_user(&req
->config
, config
->lsc_cfg
,
433 sizeof(req
->config
))) {
440 req
->table
= iommu_vmalloc(isp
->iommu
, 0, req
->config
.size
,
442 if (IS_ERR_VALUE(req
->table
)) {
448 req
->iovm
= find_iovm_area(isp
->iommu
, req
->table
);
449 if (req
->iovm
== NULL
) {
454 if (!dma_map_sg(isp
->dev
, req
->iovm
->sgt
->sgl
,
455 req
->iovm
->sgt
->nents
, DMA_TO_DEVICE
)) {
461 dma_sync_sg_for_cpu(isp
->dev
, req
->iovm
->sgt
->sgl
,
462 req
->iovm
->sgt
->nents
, DMA_TO_DEVICE
);
464 table
= da_to_va(isp
->iommu
, req
->table
);
465 if (copy_from_user(table
, config
->lsc
, req
->config
.size
)) {
470 dma_sync_sg_for_device(isp
->dev
, req
->iovm
->sgt
->sgl
,
471 req
->iovm
->sgt
->nents
, DMA_TO_DEVICE
);
474 spin_lock_irqsave(&ccdc
->lsc
.req_lock
, flags
);
475 if (ccdc
->lsc
.request
) {
476 list_add_tail(&ccdc
->lsc
.request
->list
, &ccdc
->lsc
.free_queue
);
477 schedule_work(&ccdc
->lsc
.table_work
);
479 ccdc
->lsc
.request
= req
;
480 spin_unlock_irqrestore(&ccdc
->lsc
.req_lock
, flags
);
486 ccdc_lsc_free_request(ccdc
, req
);
491 static inline int ccdc_lsc_is_configured(struct isp_ccdc_device
*ccdc
)
495 spin_lock_irqsave(&ccdc
->lsc
.req_lock
, flags
);
496 if (ccdc
->lsc
.active
) {
497 spin_unlock_irqrestore(&ccdc
->lsc
.req_lock
, flags
);
500 spin_unlock_irqrestore(&ccdc
->lsc
.req_lock
, flags
);
504 static int ccdc_lsc_enable(struct isp_ccdc_device
*ccdc
)
506 struct ispccdc_lsc
*lsc
= &ccdc
->lsc
;
508 if (lsc
->state
!= LSC_STATE_STOPPED
)
512 list_add_tail(&lsc
->active
->list
, &lsc
->free_queue
);
516 if (__ccdc_lsc_configure(ccdc
, lsc
->request
) < 0) {
517 omap3isp_sbl_disable(to_isp_device(ccdc
),
518 OMAP3_ISP_SBL_CCDC_LSC_READ
);
519 list_add_tail(&lsc
->request
->list
, &lsc
->free_queue
);
524 lsc
->active
= lsc
->request
;
526 __ccdc_lsc_enable(ccdc
, 1);
529 if (!list_empty(&lsc
->free_queue
))
530 schedule_work(&lsc
->table_work
);
535 /* -----------------------------------------------------------------------------
536 * Parameters configuration
540 * ccdc_configure_clamp - Configure optical-black or digital clamping
541 * @ccdc: Pointer to ISP CCDC device.
543 * The CCDC performs either optical-black or digital clamp. Configure and enable
544 * the selected clamp method.
546 static void ccdc_configure_clamp(struct isp_ccdc_device
*ccdc
)
548 struct isp_device
*isp
= to_isp_device(ccdc
);
552 clamp
= ccdc
->clamp
.obgain
<< ISPCCDC_CLAMP_OBGAIN_SHIFT
;
553 clamp
|= ccdc
->clamp
.oblen
<< ISPCCDC_CLAMP_OBSLEN_SHIFT
;
554 clamp
|= ccdc
->clamp
.oblines
<< ISPCCDC_CLAMP_OBSLN_SHIFT
;
555 clamp
|= ccdc
->clamp
.obstpixel
<< ISPCCDC_CLAMP_OBST_SHIFT
;
556 isp_reg_writel(isp
, clamp
, OMAP3_ISP_IOMEM_CCDC
, ISPCCDC_CLAMP
);
558 isp_reg_writel(isp
, ccdc
->clamp
.dcsubval
,
559 OMAP3_ISP_IOMEM_CCDC
, ISPCCDC_DCSUB
);
562 isp_reg_clr_set(isp
, OMAP3_ISP_IOMEM_CCDC
, ISPCCDC_CLAMP
,
563 ISPCCDC_CLAMP_CLAMPEN
,
564 ccdc
->obclamp
? ISPCCDC_CLAMP_CLAMPEN
: 0);
568 * ccdc_configure_fpc - Configure Faulty Pixel Correction
569 * @ccdc: Pointer to ISP CCDC device.
571 static void ccdc_configure_fpc(struct isp_ccdc_device
*ccdc
)
573 struct isp_device
*isp
= to_isp_device(ccdc
);
575 isp_reg_clr(isp
, OMAP3_ISP_IOMEM_CCDC
, ISPCCDC_FPC
, ISPCCDC_FPC_FPCEN
);
580 isp_reg_writel(isp
, ccdc
->fpc
.fpcaddr
, OMAP3_ISP_IOMEM_CCDC
,
582 /* The FPNUM field must be set before enabling FPC. */
583 isp_reg_writel(isp
, (ccdc
->fpc
.fpnum
<< ISPCCDC_FPC_FPNUM_SHIFT
),
584 OMAP3_ISP_IOMEM_CCDC
, ISPCCDC_FPC
);
585 isp_reg_writel(isp
, (ccdc
->fpc
.fpnum
<< ISPCCDC_FPC_FPNUM_SHIFT
) |
586 ISPCCDC_FPC_FPCEN
, OMAP3_ISP_IOMEM_CCDC
, ISPCCDC_FPC
);
590 * ccdc_configure_black_comp - Configure Black Level Compensation.
591 * @ccdc: Pointer to ISP CCDC device.
593 static void ccdc_configure_black_comp(struct isp_ccdc_device
*ccdc
)
595 struct isp_device
*isp
= to_isp_device(ccdc
);
598 blcomp
= ccdc
->blcomp
.b_mg
<< ISPCCDC_BLKCMP_B_MG_SHIFT
;
599 blcomp
|= ccdc
->blcomp
.gb_g
<< ISPCCDC_BLKCMP_GB_G_SHIFT
;
600 blcomp
|= ccdc
->blcomp
.gr_cy
<< ISPCCDC_BLKCMP_GR_CY_SHIFT
;
601 blcomp
|= ccdc
->blcomp
.r_ye
<< ISPCCDC_BLKCMP_R_YE_SHIFT
;
603 isp_reg_writel(isp
, blcomp
, OMAP3_ISP_IOMEM_CCDC
, ISPCCDC_BLKCMP
);
607 * ccdc_configure_lpf - Configure Low-Pass Filter (LPF).
608 * @ccdc: Pointer to ISP CCDC device.
610 static void ccdc_configure_lpf(struct isp_ccdc_device
*ccdc
)
612 struct isp_device
*isp
= to_isp_device(ccdc
);
614 isp_reg_clr_set(isp
, OMAP3_ISP_IOMEM_CCDC
, ISPCCDC_SYN_MODE
,
615 ISPCCDC_SYN_MODE_LPF
,
616 ccdc
->lpf
? ISPCCDC_SYN_MODE_LPF
: 0);
620 * ccdc_configure_alaw - Configure A-law compression.
621 * @ccdc: Pointer to ISP CCDC device.
623 static void ccdc_configure_alaw(struct isp_ccdc_device
*ccdc
)
625 struct isp_device
*isp
= to_isp_device(ccdc
);
628 switch (ccdc
->syncif
.datsz
) {
633 alaw
= ISPCCDC_ALAW_GWDI_9_0
;
636 alaw
= ISPCCDC_ALAW_GWDI_10_1
;
639 alaw
= ISPCCDC_ALAW_GWDI_11_2
;
642 alaw
= ISPCCDC_ALAW_GWDI_12_3
;
647 alaw
|= ISPCCDC_ALAW_CCDTBL
;
649 isp_reg_writel(isp
, alaw
, OMAP3_ISP_IOMEM_CCDC
, ISPCCDC_ALAW
);
653 * ccdc_config_imgattr - Configure sensor image specific attributes.
654 * @ccdc: Pointer to ISP CCDC device.
655 * @colptn: Color pattern of the sensor.
657 static void ccdc_config_imgattr(struct isp_ccdc_device
*ccdc
, u32 colptn
)
659 struct isp_device
*isp
= to_isp_device(ccdc
);
661 isp_reg_writel(isp
, colptn
, OMAP3_ISP_IOMEM_CCDC
, ISPCCDC_COLPTN
);
665 * ccdc_config - Set CCDC configuration from userspace
666 * @ccdc: Pointer to ISP CCDC device.
667 * @userspace_add: Structure containing CCDC configuration sent from userspace.
669 * Returns 0 if successful, -EINVAL if the pointer to the configuration
670 * structure is null, or the copy_from_user function fails to copy user space
671 * memory to kernel space memory.
673 static int ccdc_config(struct isp_ccdc_device
*ccdc
,
674 struct omap3isp_ccdc_update_config
*ccdc_struct
)
676 struct isp_device
*isp
= to_isp_device(ccdc
);
679 spin_lock_irqsave(&ccdc
->lock
, flags
);
680 ccdc
->shadow_update
= 1;
681 spin_unlock_irqrestore(&ccdc
->lock
, flags
);
683 if (OMAP3ISP_CCDC_ALAW
& ccdc_struct
->update
) {
684 ccdc
->alaw
= !!(OMAP3ISP_CCDC_ALAW
& ccdc_struct
->flag
);
685 ccdc
->update
|= OMAP3ISP_CCDC_ALAW
;
688 if (OMAP3ISP_CCDC_LPF
& ccdc_struct
->update
) {
689 ccdc
->lpf
= !!(OMAP3ISP_CCDC_LPF
& ccdc_struct
->flag
);
690 ccdc
->update
|= OMAP3ISP_CCDC_LPF
;
693 if (OMAP3ISP_CCDC_BLCLAMP
& ccdc_struct
->update
) {
694 if (copy_from_user(&ccdc
->clamp
, ccdc_struct
->bclamp
,
695 sizeof(ccdc
->clamp
))) {
696 ccdc
->shadow_update
= 0;
700 ccdc
->obclamp
= !!(OMAP3ISP_CCDC_BLCLAMP
& ccdc_struct
->flag
);
701 ccdc
->update
|= OMAP3ISP_CCDC_BLCLAMP
;
704 if (OMAP3ISP_CCDC_BCOMP
& ccdc_struct
->update
) {
705 if (copy_from_user(&ccdc
->blcomp
, ccdc_struct
->blcomp
,
706 sizeof(ccdc
->blcomp
))) {
707 ccdc
->shadow_update
= 0;
711 ccdc
->update
|= OMAP3ISP_CCDC_BCOMP
;
714 ccdc
->shadow_update
= 0;
716 if (OMAP3ISP_CCDC_FPC
& ccdc_struct
->update
) {
721 if (ccdc
->state
!= ISP_PIPELINE_STREAM_STOPPED
)
724 ccdc
->fpc_en
= !!(OMAP3ISP_CCDC_FPC
& ccdc_struct
->flag
);
727 if (copy_from_user(&ccdc
->fpc
, ccdc_struct
->fpc
,
732 * table_new must be 64-bytes aligned, but it's
733 * already done by iommu_vmalloc().
735 size
= ccdc
->fpc
.fpnum
* 4;
736 table_new
= iommu_vmalloc(isp
->iommu
, 0, size
,
738 if (IS_ERR_VALUE(table_new
))
741 if (copy_from_user(da_to_va(isp
->iommu
, table_new
),
742 (__force
void __user
*)
743 ccdc
->fpc
.fpcaddr
, size
)) {
744 iommu_vfree(isp
->iommu
, table_new
);
748 table_old
= ccdc
->fpc
.fpcaddr
;
749 ccdc
->fpc
.fpcaddr
= table_new
;
752 ccdc_configure_fpc(ccdc
);
754 iommu_vfree(isp
->iommu
, table_old
);
757 return ccdc_lsc_config(ccdc
, ccdc_struct
);
760 static void ccdc_apply_controls(struct isp_ccdc_device
*ccdc
)
762 if (ccdc
->update
& OMAP3ISP_CCDC_ALAW
) {
763 ccdc_configure_alaw(ccdc
);
764 ccdc
->update
&= ~OMAP3ISP_CCDC_ALAW
;
767 if (ccdc
->update
& OMAP3ISP_CCDC_LPF
) {
768 ccdc_configure_lpf(ccdc
);
769 ccdc
->update
&= ~OMAP3ISP_CCDC_LPF
;
772 if (ccdc
->update
& OMAP3ISP_CCDC_BLCLAMP
) {
773 ccdc_configure_clamp(ccdc
);
774 ccdc
->update
&= ~OMAP3ISP_CCDC_BLCLAMP
;
777 if (ccdc
->update
& OMAP3ISP_CCDC_BCOMP
) {
778 ccdc_configure_black_comp(ccdc
);
779 ccdc
->update
&= ~OMAP3ISP_CCDC_BCOMP
;
784 * omap3isp_ccdc_restore_context - Restore values of the CCDC module registers
785 * @dev: Pointer to ISP device
787 void omap3isp_ccdc_restore_context(struct isp_device
*isp
)
789 struct isp_ccdc_device
*ccdc
= &isp
->isp_ccdc
;
791 isp_reg_set(isp
, OMAP3_ISP_IOMEM_CCDC
, ISPCCDC_CFG
, ISPCCDC_CFG_VDLC
);
793 ccdc
->update
= OMAP3ISP_CCDC_ALAW
| OMAP3ISP_CCDC_LPF
794 | OMAP3ISP_CCDC_BLCLAMP
| OMAP3ISP_CCDC_BCOMP
;
795 ccdc_apply_controls(ccdc
);
796 ccdc_configure_fpc(ccdc
);
799 /* -----------------------------------------------------------------------------
800 * Format- and pipeline-related configuration helpers
804 * ccdc_config_vp - Configure the Video Port.
805 * @ccdc: Pointer to ISP CCDC device.
807 static void ccdc_config_vp(struct isp_ccdc_device
*ccdc
)
809 struct isp_pipeline
*pipe
= to_isp_pipeline(&ccdc
->subdev
.entity
);
810 struct isp_device
*isp
= to_isp_device(ccdc
);
811 unsigned long l3_ick
= pipe
->l3_ick
;
812 unsigned int max_div
= isp
->revision
== ISP_REVISION_15_0
? 64 : 8;
813 unsigned int div
= 0;
816 fmtcfg_vp
= isp_reg_readl(isp
, OMAP3_ISP_IOMEM_CCDC
, ISPCCDC_FMTCFG
)
817 & ~(ISPCCDC_FMTCFG_VPIN_MASK
| ISPCCDC_FMTCFG_VPIF_FRQ_MASK
);
819 switch (ccdc
->syncif
.datsz
) {
822 fmtcfg_vp
|= ISPCCDC_FMTCFG_VPIN_9_0
;
825 fmtcfg_vp
|= ISPCCDC_FMTCFG_VPIN_10_1
;
828 fmtcfg_vp
|= ISPCCDC_FMTCFG_VPIN_11_2
;
831 fmtcfg_vp
|= ISPCCDC_FMTCFG_VPIN_12_3
;
836 div
= DIV_ROUND_UP(l3_ick
, pipe
->max_rate
);
837 else if (ccdc
->vpcfg
.pixelclk
)
838 div
= l3_ick
/ ccdc
->vpcfg
.pixelclk
;
840 div
= clamp(div
, 2U, max_div
);
841 fmtcfg_vp
|= (div
- 2) << ISPCCDC_FMTCFG_VPIF_FRQ_SHIFT
;
843 isp_reg_writel(isp
, fmtcfg_vp
, OMAP3_ISP_IOMEM_CCDC
, ISPCCDC_FMTCFG
);
847 * ccdc_enable_vp - Enable Video Port.
848 * @ccdc: Pointer to ISP CCDC device.
849 * @enable: 0 Disables VP, 1 Enables VP
851 * This is needed for outputting image to Preview, H3A and HIST ISP submodules.
853 static void ccdc_enable_vp(struct isp_ccdc_device
*ccdc
, u8 enable
)
855 struct isp_device
*isp
= to_isp_device(ccdc
);
857 isp_reg_clr_set(isp
, OMAP3_ISP_IOMEM_CCDC
, ISPCCDC_FMTCFG
,
858 ISPCCDC_FMTCFG_VPEN
, enable
? ISPCCDC_FMTCFG_VPEN
: 0);
862 * ccdc_config_outlineoffset - Configure memory saving output line offset
863 * @ccdc: Pointer to ISP CCDC device.
864 * @offset: Address offset to start a new line. Must be twice the
865 * Output width and aligned on 32 byte boundary
866 * @oddeven: Specifies the odd/even line pattern to be chosen to store the
868 * @numlines: Set the value 0-3 for +1-4lines, 4-7 for -1-4lines.
870 * - Configures the output line offset when stored in memory
871 * - Sets the odd/even line pattern to store the output
872 * (EVENEVEN (1), ODDEVEN (2), EVENODD (3), ODDODD (4))
873 * - Configures the number of even and odd line fields in case of rearranging
876 static void ccdc_config_outlineoffset(struct isp_ccdc_device
*ccdc
,
877 u32 offset
, u8 oddeven
, u8 numlines
)
879 struct isp_device
*isp
= to_isp_device(ccdc
);
881 isp_reg_writel(isp
, offset
& 0xffff,
882 OMAP3_ISP_IOMEM_CCDC
, ISPCCDC_HSIZE_OFF
);
884 isp_reg_clr(isp
, OMAP3_ISP_IOMEM_CCDC
, ISPCCDC_SDOFST
,
885 ISPCCDC_SDOFST_FINV
);
887 isp_reg_clr(isp
, OMAP3_ISP_IOMEM_CCDC
, ISPCCDC_SDOFST
,
888 ISPCCDC_SDOFST_FOFST_4L
);
892 isp_reg_set(isp
, OMAP3_ISP_IOMEM_CCDC
, ISPCCDC_SDOFST
,
893 (numlines
& 0x7) << ISPCCDC_SDOFST_LOFST0_SHIFT
);
896 isp_reg_set(isp
, OMAP3_ISP_IOMEM_CCDC
, ISPCCDC_SDOFST
,
897 (numlines
& 0x7) << ISPCCDC_SDOFST_LOFST1_SHIFT
);
900 isp_reg_set(isp
, OMAP3_ISP_IOMEM_CCDC
, ISPCCDC_SDOFST
,
901 (numlines
& 0x7) << ISPCCDC_SDOFST_LOFST2_SHIFT
);
904 isp_reg_set(isp
, OMAP3_ISP_IOMEM_CCDC
, ISPCCDC_SDOFST
,
905 (numlines
& 0x7) << ISPCCDC_SDOFST_LOFST3_SHIFT
);
913 * ccdc_set_outaddr - Set memory address to save output image
914 * @ccdc: Pointer to ISP CCDC device.
915 * @addr: ISP MMU Mapped 32-bit memory address aligned on 32 byte boundary.
917 * Sets the memory address where the output will be saved.
919 static void ccdc_set_outaddr(struct isp_ccdc_device
*ccdc
, u32 addr
)
921 struct isp_device
*isp
= to_isp_device(ccdc
);
923 isp_reg_writel(isp
, addr
, OMAP3_ISP_IOMEM_CCDC
, ISPCCDC_SDR_ADDR
);
927 * omap3isp_ccdc_max_rate - Calculate maximum input data rate based on the input
928 * @ccdc: Pointer to ISP CCDC device.
929 * @max_rate: Maximum calculated data rate.
931 * Returns in *max_rate less value between calculated and passed
933 void omap3isp_ccdc_max_rate(struct isp_ccdc_device
*ccdc
,
934 unsigned int *max_rate
)
936 struct isp_pipeline
*pipe
= to_isp_pipeline(&ccdc
->subdev
.entity
);
943 * TRM says that for parallel sensors the maximum data rate
944 * should be 90% form L3/2 clock, otherwise just L3/2.
946 if (ccdc
->input
== CCDC_INPUT_PARALLEL
)
947 rate
= pipe
->l3_ick
/ 2 * 9 / 10;
949 rate
= pipe
->l3_ick
/ 2;
951 *max_rate
= min(*max_rate
, rate
);
955 * ccdc_config_sync_if - Set CCDC sync interface configuration
956 * @ccdc: Pointer to ISP CCDC device.
957 * @syncif: Structure containing the sync parameters like field state, CCDC in
958 * master/slave mode, raw/yuv data, polarity of data, field, hs, vs
961 static void ccdc_config_sync_if(struct isp_ccdc_device
*ccdc
,
962 struct ispccdc_syncif
*syncif
)
964 struct isp_device
*isp
= to_isp_device(ccdc
);
965 u32 syn_mode
= isp_reg_readl(isp
, OMAP3_ISP_IOMEM_CCDC
,
968 syn_mode
|= ISPCCDC_SYN_MODE_VDHDEN
;
971 syn_mode
|= ISPCCDC_SYN_MODE_FLDSTAT
;
973 syn_mode
&= ~ISPCCDC_SYN_MODE_FLDSTAT
;
975 syn_mode
&= ~ISPCCDC_SYN_MODE_DATSIZ_MASK
;
976 switch (syncif
->datsz
) {
978 syn_mode
|= ISPCCDC_SYN_MODE_DATSIZ_8
;
981 syn_mode
|= ISPCCDC_SYN_MODE_DATSIZ_10
;
984 syn_mode
|= ISPCCDC_SYN_MODE_DATSIZ_11
;
987 syn_mode
|= ISPCCDC_SYN_MODE_DATSIZ_12
;
992 syn_mode
|= ISPCCDC_SYN_MODE_FLDMODE
;
994 syn_mode
&= ~ISPCCDC_SYN_MODE_FLDMODE
;
997 syn_mode
|= ISPCCDC_SYN_MODE_DATAPOL
;
999 syn_mode
&= ~ISPCCDC_SYN_MODE_DATAPOL
;
1002 syn_mode
|= ISPCCDC_SYN_MODE_FLDPOL
;
1004 syn_mode
&= ~ISPCCDC_SYN_MODE_FLDPOL
;
1007 syn_mode
|= ISPCCDC_SYN_MODE_HDPOL
;
1009 syn_mode
&= ~ISPCCDC_SYN_MODE_HDPOL
;
1012 syn_mode
|= ISPCCDC_SYN_MODE_VDPOL
;
1014 syn_mode
&= ~ISPCCDC_SYN_MODE_VDPOL
;
1016 if (syncif
->ccdc_mastermode
) {
1017 syn_mode
|= ISPCCDC_SYN_MODE_FLDOUT
| ISPCCDC_SYN_MODE_VDHDOUT
;
1019 syncif
->hs_width
<< ISPCCDC_HD_VD_WID_HDW_SHIFT
1020 | syncif
->vs_width
<< ISPCCDC_HD_VD_WID_VDW_SHIFT
,
1021 OMAP3_ISP_IOMEM_CCDC
,
1025 syncif
->ppln
<< ISPCCDC_PIX_LINES_PPLN_SHIFT
1026 | syncif
->hlprf
<< ISPCCDC_PIX_LINES_HLPRF_SHIFT
,
1027 OMAP3_ISP_IOMEM_CCDC
,
1030 syn_mode
&= ~(ISPCCDC_SYN_MODE_FLDOUT
|
1031 ISPCCDC_SYN_MODE_VDHDOUT
);
1033 isp_reg_writel(isp
, syn_mode
, OMAP3_ISP_IOMEM_CCDC
, ISPCCDC_SYN_MODE
);
1035 if (!syncif
->bt_r656_en
)
1036 isp_reg_clr(isp
, OMAP3_ISP_IOMEM_CCDC
, ISPCCDC_REC656IF
,
1037 ISPCCDC_REC656IF_R656ON
);
1040 /* CCDC formats descriptions */
1041 static const u32 ccdc_sgrbg_pattern
=
1042 ISPCCDC_COLPTN_Gr_Cy
<< ISPCCDC_COLPTN_CP0PLC0_SHIFT
|
1043 ISPCCDC_COLPTN_R_Ye
<< ISPCCDC_COLPTN_CP0PLC1_SHIFT
|
1044 ISPCCDC_COLPTN_Gr_Cy
<< ISPCCDC_COLPTN_CP0PLC2_SHIFT
|
1045 ISPCCDC_COLPTN_R_Ye
<< ISPCCDC_COLPTN_CP0PLC3_SHIFT
|
1046 ISPCCDC_COLPTN_B_Mg
<< ISPCCDC_COLPTN_CP1PLC0_SHIFT
|
1047 ISPCCDC_COLPTN_Gb_G
<< ISPCCDC_COLPTN_CP1PLC1_SHIFT
|
1048 ISPCCDC_COLPTN_B_Mg
<< ISPCCDC_COLPTN_CP1PLC2_SHIFT
|
1049 ISPCCDC_COLPTN_Gb_G
<< ISPCCDC_COLPTN_CP1PLC3_SHIFT
|
1050 ISPCCDC_COLPTN_Gr_Cy
<< ISPCCDC_COLPTN_CP2PLC0_SHIFT
|
1051 ISPCCDC_COLPTN_R_Ye
<< ISPCCDC_COLPTN_CP2PLC1_SHIFT
|
1052 ISPCCDC_COLPTN_Gr_Cy
<< ISPCCDC_COLPTN_CP2PLC2_SHIFT
|
1053 ISPCCDC_COLPTN_R_Ye
<< ISPCCDC_COLPTN_CP2PLC3_SHIFT
|
1054 ISPCCDC_COLPTN_B_Mg
<< ISPCCDC_COLPTN_CP3PLC0_SHIFT
|
1055 ISPCCDC_COLPTN_Gb_G
<< ISPCCDC_COLPTN_CP3PLC1_SHIFT
|
1056 ISPCCDC_COLPTN_B_Mg
<< ISPCCDC_COLPTN_CP3PLC2_SHIFT
|
1057 ISPCCDC_COLPTN_Gb_G
<< ISPCCDC_COLPTN_CP3PLC3_SHIFT
;
1059 static const u32 ccdc_srggb_pattern
=
1060 ISPCCDC_COLPTN_R_Ye
<< ISPCCDC_COLPTN_CP0PLC0_SHIFT
|
1061 ISPCCDC_COLPTN_Gr_Cy
<< ISPCCDC_COLPTN_CP0PLC1_SHIFT
|
1062 ISPCCDC_COLPTN_R_Ye
<< ISPCCDC_COLPTN_CP0PLC2_SHIFT
|
1063 ISPCCDC_COLPTN_Gr_Cy
<< ISPCCDC_COLPTN_CP0PLC3_SHIFT
|
1064 ISPCCDC_COLPTN_Gb_G
<< ISPCCDC_COLPTN_CP1PLC0_SHIFT
|
1065 ISPCCDC_COLPTN_B_Mg
<< ISPCCDC_COLPTN_CP1PLC1_SHIFT
|
1066 ISPCCDC_COLPTN_Gb_G
<< ISPCCDC_COLPTN_CP1PLC2_SHIFT
|
1067 ISPCCDC_COLPTN_B_Mg
<< ISPCCDC_COLPTN_CP1PLC3_SHIFT
|
1068 ISPCCDC_COLPTN_R_Ye
<< ISPCCDC_COLPTN_CP2PLC0_SHIFT
|
1069 ISPCCDC_COLPTN_Gr_Cy
<< ISPCCDC_COLPTN_CP2PLC1_SHIFT
|
1070 ISPCCDC_COLPTN_R_Ye
<< ISPCCDC_COLPTN_CP2PLC2_SHIFT
|
1071 ISPCCDC_COLPTN_Gr_Cy
<< ISPCCDC_COLPTN_CP2PLC3_SHIFT
|
1072 ISPCCDC_COLPTN_Gb_G
<< ISPCCDC_COLPTN_CP3PLC0_SHIFT
|
1073 ISPCCDC_COLPTN_B_Mg
<< ISPCCDC_COLPTN_CP3PLC1_SHIFT
|
1074 ISPCCDC_COLPTN_Gb_G
<< ISPCCDC_COLPTN_CP3PLC2_SHIFT
|
1075 ISPCCDC_COLPTN_B_Mg
<< ISPCCDC_COLPTN_CP3PLC3_SHIFT
;
1077 static const u32 ccdc_sbggr_pattern
=
1078 ISPCCDC_COLPTN_B_Mg
<< ISPCCDC_COLPTN_CP0PLC0_SHIFT
|
1079 ISPCCDC_COLPTN_Gb_G
<< ISPCCDC_COLPTN_CP0PLC1_SHIFT
|
1080 ISPCCDC_COLPTN_B_Mg
<< ISPCCDC_COLPTN_CP0PLC2_SHIFT
|
1081 ISPCCDC_COLPTN_Gb_G
<< ISPCCDC_COLPTN_CP0PLC3_SHIFT
|
1082 ISPCCDC_COLPTN_Gr_Cy
<< ISPCCDC_COLPTN_CP1PLC0_SHIFT
|
1083 ISPCCDC_COLPTN_R_Ye
<< ISPCCDC_COLPTN_CP1PLC1_SHIFT
|
1084 ISPCCDC_COLPTN_Gr_Cy
<< ISPCCDC_COLPTN_CP1PLC2_SHIFT
|
1085 ISPCCDC_COLPTN_R_Ye
<< ISPCCDC_COLPTN_CP1PLC3_SHIFT
|
1086 ISPCCDC_COLPTN_B_Mg
<< ISPCCDC_COLPTN_CP2PLC0_SHIFT
|
1087 ISPCCDC_COLPTN_Gb_G
<< ISPCCDC_COLPTN_CP2PLC1_SHIFT
|
1088 ISPCCDC_COLPTN_B_Mg
<< ISPCCDC_COLPTN_CP2PLC2_SHIFT
|
1089 ISPCCDC_COLPTN_Gb_G
<< ISPCCDC_COLPTN_CP2PLC3_SHIFT
|
1090 ISPCCDC_COLPTN_Gr_Cy
<< ISPCCDC_COLPTN_CP3PLC0_SHIFT
|
1091 ISPCCDC_COLPTN_R_Ye
<< ISPCCDC_COLPTN_CP3PLC1_SHIFT
|
1092 ISPCCDC_COLPTN_Gr_Cy
<< ISPCCDC_COLPTN_CP3PLC2_SHIFT
|
1093 ISPCCDC_COLPTN_R_Ye
<< ISPCCDC_COLPTN_CP3PLC3_SHIFT
;
1095 static const u32 ccdc_sgbrg_pattern
=
1096 ISPCCDC_COLPTN_Gb_G
<< ISPCCDC_COLPTN_CP0PLC0_SHIFT
|
1097 ISPCCDC_COLPTN_B_Mg
<< ISPCCDC_COLPTN_CP0PLC1_SHIFT
|
1098 ISPCCDC_COLPTN_Gb_G
<< ISPCCDC_COLPTN_CP0PLC2_SHIFT
|
1099 ISPCCDC_COLPTN_B_Mg
<< ISPCCDC_COLPTN_CP0PLC3_SHIFT
|
1100 ISPCCDC_COLPTN_R_Ye
<< ISPCCDC_COLPTN_CP1PLC0_SHIFT
|
1101 ISPCCDC_COLPTN_Gr_Cy
<< ISPCCDC_COLPTN_CP1PLC1_SHIFT
|
1102 ISPCCDC_COLPTN_R_Ye
<< ISPCCDC_COLPTN_CP1PLC2_SHIFT
|
1103 ISPCCDC_COLPTN_Gr_Cy
<< ISPCCDC_COLPTN_CP1PLC3_SHIFT
|
1104 ISPCCDC_COLPTN_Gb_G
<< ISPCCDC_COLPTN_CP2PLC0_SHIFT
|
1105 ISPCCDC_COLPTN_B_Mg
<< ISPCCDC_COLPTN_CP2PLC1_SHIFT
|
1106 ISPCCDC_COLPTN_Gb_G
<< ISPCCDC_COLPTN_CP2PLC2_SHIFT
|
1107 ISPCCDC_COLPTN_B_Mg
<< ISPCCDC_COLPTN_CP2PLC3_SHIFT
|
1108 ISPCCDC_COLPTN_R_Ye
<< ISPCCDC_COLPTN_CP3PLC0_SHIFT
|
1109 ISPCCDC_COLPTN_Gr_Cy
<< ISPCCDC_COLPTN_CP3PLC1_SHIFT
|
1110 ISPCCDC_COLPTN_R_Ye
<< ISPCCDC_COLPTN_CP3PLC2_SHIFT
|
1111 ISPCCDC_COLPTN_Gr_Cy
<< ISPCCDC_COLPTN_CP3PLC3_SHIFT
;
1113 static void ccdc_configure(struct isp_ccdc_device
*ccdc
)
1115 struct isp_device
*isp
= to_isp_device(ccdc
);
1116 struct isp_parallel_platform_data
*pdata
= NULL
;
1117 struct v4l2_subdev
*sensor
;
1118 struct v4l2_mbus_framefmt
*format
;
1119 const struct isp_format_info
*fmt_info
;
1120 struct v4l2_subdev_format fmt_src
;
1121 unsigned int depth_out
;
1122 unsigned int depth_in
= 0;
1123 struct media_pad
*pad
;
1124 unsigned long flags
;
1129 pad
= media_entity_remote_source(&ccdc
->pads
[CCDC_PAD_SINK
]);
1130 sensor
= media_entity_to_v4l2_subdev(pad
->entity
);
1131 if (ccdc
->input
== CCDC_INPUT_PARALLEL
)
1132 pdata
= &((struct isp_v4l2_subdevs_group
*)sensor
->host_priv
)
1135 /* Compute shift value for lane shifter to configure the bridge. */
1136 fmt_src
.pad
= pad
->index
;
1137 fmt_src
.which
= V4L2_SUBDEV_FORMAT_ACTIVE
;
1138 if (!v4l2_subdev_call(sensor
, pad
, get_fmt
, NULL
, &fmt_src
)) {
1139 fmt_info
= omap3isp_video_format_info(fmt_src
.format
.code
);
1140 depth_in
= fmt_info
->bpp
;
1143 fmt_info
= omap3isp_video_format_info
1144 (isp
->isp_ccdc
.formats
[CCDC_PAD_SINK
].code
);
1145 depth_out
= fmt_info
->bpp
;
1147 shift
= depth_in
- depth_out
;
1148 omap3isp_configure_bridge(isp
, ccdc
->input
, pdata
, shift
);
1150 ccdc
->syncif
.datsz
= depth_out
;
1151 ccdc
->syncif
.hdpol
= pdata
? pdata
->hs_pol
: 0;
1152 ccdc
->syncif
.vdpol
= pdata
? pdata
->vs_pol
: 0;
1153 ccdc_config_sync_if(ccdc
, &ccdc
->syncif
);
1156 format
= &ccdc
->formats
[CCDC_PAD_SINK
];
1158 syn_mode
= isp_reg_readl(isp
, OMAP3_ISP_IOMEM_CCDC
, ISPCCDC_SYN_MODE
);
1160 /* Use the raw, unprocessed data when writing to memory. The H3A and
1161 * histogram modules are still fed with lens shading corrected data.
1163 syn_mode
&= ~ISPCCDC_SYN_MODE_VP2SDR
;
1165 if (ccdc
->output
& CCDC_OUTPUT_MEMORY
)
1166 syn_mode
|= ISPCCDC_SYN_MODE_WEN
;
1168 syn_mode
&= ~ISPCCDC_SYN_MODE_WEN
;
1170 if (ccdc
->output
& CCDC_OUTPUT_RESIZER
)
1171 syn_mode
|= ISPCCDC_SYN_MODE_SDR2RSZ
;
1173 syn_mode
&= ~ISPCCDC_SYN_MODE_SDR2RSZ
;
1175 /* Use PACK8 mode for 1byte per pixel formats. */
1176 if (omap3isp_video_format_info(format
->code
)->bpp
<= 8)
1177 syn_mode
|= ISPCCDC_SYN_MODE_PACK8
;
1179 syn_mode
&= ~ISPCCDC_SYN_MODE_PACK8
;
1181 isp_reg_writel(isp
, syn_mode
, OMAP3_ISP_IOMEM_CCDC
, ISPCCDC_SYN_MODE
);
1184 switch (format
->code
) {
1185 case V4L2_MBUS_FMT_SRGGB10_1X10
:
1186 case V4L2_MBUS_FMT_SRGGB12_1X12
:
1187 ccdc_pattern
= ccdc_srggb_pattern
;
1189 case V4L2_MBUS_FMT_SBGGR10_1X10
:
1190 case V4L2_MBUS_FMT_SBGGR12_1X12
:
1191 ccdc_pattern
= ccdc_sbggr_pattern
;
1193 case V4L2_MBUS_FMT_SGBRG10_1X10
:
1194 case V4L2_MBUS_FMT_SGBRG12_1X12
:
1195 ccdc_pattern
= ccdc_sgbrg_pattern
;
1199 ccdc_pattern
= ccdc_sgrbg_pattern
;
1202 ccdc_config_imgattr(ccdc
, ccdc_pattern
);
1204 /* Generate VD0 on the last line of the image and VD1 on the
1207 isp_reg_writel(isp
, ((format
->height
- 2) << ISPCCDC_VDINT_0_SHIFT
) |
1208 ((format
->height
* 2 / 3) << ISPCCDC_VDINT_1_SHIFT
),
1209 OMAP3_ISP_IOMEM_CCDC
, ISPCCDC_VDINT
);
1211 /* CCDC_PAD_SOURCE_OF */
1212 format
= &ccdc
->formats
[CCDC_PAD_SOURCE_OF
];
1214 isp_reg_writel(isp
, (0 << ISPCCDC_HORZ_INFO_SPH_SHIFT
) |
1215 ((format
->width
- 1) << ISPCCDC_HORZ_INFO_NPH_SHIFT
),
1216 OMAP3_ISP_IOMEM_CCDC
, ISPCCDC_HORZ_INFO
);
1217 isp_reg_writel(isp
, 0 << ISPCCDC_VERT_START_SLV0_SHIFT
,
1218 OMAP3_ISP_IOMEM_CCDC
, ISPCCDC_VERT_START
);
1219 isp_reg_writel(isp
, (format
->height
- 1)
1220 << ISPCCDC_VERT_LINES_NLV_SHIFT
,
1221 OMAP3_ISP_IOMEM_CCDC
, ISPCCDC_VERT_LINES
);
1223 ccdc_config_outlineoffset(ccdc
, ccdc
->video_out
.bpl_value
, 0, 0);
1225 /* CCDC_PAD_SOURCE_VP */
1226 format
= &ccdc
->formats
[CCDC_PAD_SOURCE_VP
];
1228 isp_reg_writel(isp
, (0 << ISPCCDC_FMT_HORZ_FMTSPH_SHIFT
) |
1229 (format
->width
<< ISPCCDC_FMT_HORZ_FMTLNH_SHIFT
),
1230 OMAP3_ISP_IOMEM_CCDC
, ISPCCDC_FMT_HORZ
);
1231 isp_reg_writel(isp
, (0 << ISPCCDC_FMT_VERT_FMTSLV_SHIFT
) |
1232 ((format
->height
+ 1) << ISPCCDC_FMT_VERT_FMTLNV_SHIFT
),
1233 OMAP3_ISP_IOMEM_CCDC
, ISPCCDC_FMT_VERT
);
1235 isp_reg_writel(isp
, (format
->width
<< ISPCCDC_VP_OUT_HORZ_NUM_SHIFT
) |
1236 (format
->height
<< ISPCCDC_VP_OUT_VERT_NUM_SHIFT
),
1237 OMAP3_ISP_IOMEM_CCDC
, ISPCCDC_VP_OUT
);
1239 spin_lock_irqsave(&ccdc
->lsc
.req_lock
, flags
);
1240 if (ccdc
->lsc
.request
== NULL
)
1243 WARN_ON(ccdc
->lsc
.active
);
1245 /* Get last good LSC configuration. If it is not supported for
1246 * the current active resolution discard it.
1248 if (ccdc
->lsc
.active
== NULL
&&
1249 __ccdc_lsc_configure(ccdc
, ccdc
->lsc
.request
) == 0) {
1250 ccdc
->lsc
.active
= ccdc
->lsc
.request
;
1252 list_add_tail(&ccdc
->lsc
.request
->list
, &ccdc
->lsc
.free_queue
);
1253 schedule_work(&ccdc
->lsc
.table_work
);
1256 ccdc
->lsc
.request
= NULL
;
1259 spin_unlock_irqrestore(&ccdc
->lsc
.req_lock
, flags
);
1261 ccdc_apply_controls(ccdc
);
1264 static void __ccdc_enable(struct isp_ccdc_device
*ccdc
, int enable
)
1266 struct isp_device
*isp
= to_isp_device(ccdc
);
1268 isp_reg_clr_set(isp
, OMAP3_ISP_IOMEM_CCDC
, ISPCCDC_PCR
,
1269 ISPCCDC_PCR_EN
, enable
? ISPCCDC_PCR_EN
: 0);
1272 static int ccdc_disable(struct isp_ccdc_device
*ccdc
)
1274 unsigned long flags
;
1277 spin_lock_irqsave(&ccdc
->lock
, flags
);
1278 if (ccdc
->state
== ISP_PIPELINE_STREAM_CONTINUOUS
)
1279 ccdc
->stopping
= CCDC_STOP_REQUEST
;
1280 spin_unlock_irqrestore(&ccdc
->lock
, flags
);
1282 ret
= wait_event_timeout(ccdc
->wait
,
1283 ccdc
->stopping
== CCDC_STOP_FINISHED
,
1284 msecs_to_jiffies(2000));
1287 dev_warn(to_device(ccdc
), "CCDC stop timeout!\n");
1290 omap3isp_sbl_disable(to_isp_device(ccdc
), OMAP3_ISP_SBL_CCDC_LSC_READ
);
1292 mutex_lock(&ccdc
->ioctl_lock
);
1293 ccdc_lsc_free_request(ccdc
, ccdc
->lsc
.request
);
1294 ccdc
->lsc
.request
= ccdc
->lsc
.active
;
1295 ccdc
->lsc
.active
= NULL
;
1296 cancel_work_sync(&ccdc
->lsc
.table_work
);
1297 ccdc_lsc_free_queue(ccdc
, &ccdc
->lsc
.free_queue
);
1298 mutex_unlock(&ccdc
->ioctl_lock
);
1300 ccdc
->stopping
= CCDC_STOP_NOT_REQUESTED
;
1302 return ret
> 0 ? 0 : ret
;
1305 static void ccdc_enable(struct isp_ccdc_device
*ccdc
)
1307 if (ccdc_lsc_is_configured(ccdc
))
1308 __ccdc_lsc_enable(ccdc
, 1);
1309 __ccdc_enable(ccdc
, 1);
1312 /* -----------------------------------------------------------------------------
1313 * Interrupt handling
1317 * ccdc_sbl_busy - Poll idle state of CCDC and related SBL memory write bits
1318 * @ccdc: Pointer to ISP CCDC device.
1320 * Returns zero if the CCDC is idle and the image has been written to
1323 static int ccdc_sbl_busy(struct isp_ccdc_device
*ccdc
)
1325 struct isp_device
*isp
= to_isp_device(ccdc
);
1327 return omap3isp_ccdc_busy(ccdc
)
1328 | (isp_reg_readl(isp
, OMAP3_ISP_IOMEM_SBL
, ISPSBL_CCDC_WR_0
) &
1329 ISPSBL_CCDC_WR_0_DATA_READY
)
1330 | (isp_reg_readl(isp
, OMAP3_ISP_IOMEM_SBL
, ISPSBL_CCDC_WR_1
) &
1331 ISPSBL_CCDC_WR_0_DATA_READY
)
1332 | (isp_reg_readl(isp
, OMAP3_ISP_IOMEM_SBL
, ISPSBL_CCDC_WR_2
) &
1333 ISPSBL_CCDC_WR_0_DATA_READY
)
1334 | (isp_reg_readl(isp
, OMAP3_ISP_IOMEM_SBL
, ISPSBL_CCDC_WR_3
) &
1335 ISPSBL_CCDC_WR_0_DATA_READY
);
1339 * ccdc_sbl_wait_idle - Wait until the CCDC and related SBL are idle
1340 * @ccdc: Pointer to ISP CCDC device.
1341 * @max_wait: Max retry count in us for wait for idle/busy transition.
1343 static int ccdc_sbl_wait_idle(struct isp_ccdc_device
*ccdc
,
1344 unsigned int max_wait
)
1346 unsigned int wait
= 0;
1349 max_wait
= 10000; /* 10 ms */
1351 for (wait
= 0; wait
<= max_wait
; wait
++) {
1352 if (!ccdc_sbl_busy(ccdc
))
1362 /* __ccdc_handle_stopping - Handle CCDC and/or LSC stopping sequence
1363 * @ccdc: Pointer to ISP CCDC device.
1364 * @event: Pointing which event trigger handler
1366 * Return 1 when the event and stopping request combination is satisfied,
1369 static int __ccdc_handle_stopping(struct isp_ccdc_device
*ccdc
, u32 event
)
1373 switch ((ccdc
->stopping
& 3) | event
) {
1374 case CCDC_STOP_REQUEST
| CCDC_EVENT_VD1
:
1375 if (ccdc
->lsc
.state
!= LSC_STATE_STOPPED
)
1376 __ccdc_lsc_enable(ccdc
, 0);
1377 __ccdc_enable(ccdc
, 0);
1378 ccdc
->stopping
= CCDC_STOP_EXECUTED
;
1381 case CCDC_STOP_EXECUTED
| CCDC_EVENT_VD0
:
1382 ccdc
->stopping
|= CCDC_STOP_CCDC_FINISHED
;
1383 if (ccdc
->lsc
.state
== LSC_STATE_STOPPED
)
1384 ccdc
->stopping
|= CCDC_STOP_LSC_FINISHED
;
1388 case CCDC_STOP_EXECUTED
| CCDC_EVENT_LSC_DONE
:
1389 ccdc
->stopping
|= CCDC_STOP_LSC_FINISHED
;
1393 case CCDC_STOP_EXECUTED
| CCDC_EVENT_VD1
:
1397 if (ccdc
->stopping
== CCDC_STOP_FINISHED
) {
1398 wake_up(&ccdc
->wait
);
1405 static void ccdc_hs_vs_isr(struct isp_ccdc_device
*ccdc
)
1407 struct video_device
*vdev
= &ccdc
->subdev
.devnode
;
1408 struct v4l2_event event
;
1410 memset(&event
, 0, sizeof(event
));
1411 event
.type
= V4L2_EVENT_OMAP3ISP_HS_VS
;
1413 v4l2_event_queue(vdev
, &event
);
1417 * ccdc_lsc_isr - Handle LSC events
1418 * @ccdc: Pointer to ISP CCDC device.
1419 * @events: LSC events
1421 static void ccdc_lsc_isr(struct isp_ccdc_device
*ccdc
, u32 events
)
1423 unsigned long flags
;
1425 if (events
& IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ
) {
1426 ccdc_lsc_error_handler(ccdc
);
1428 dev_dbg(to_device(ccdc
), "lsc prefetch error\n");
1431 if (!(events
& IRQ0STATUS_CCDC_LSC_DONE_IRQ
))
1434 /* LSC_DONE interrupt occur, there are two cases
1435 * 1. stopping for reconfiguration
1436 * 2. stopping because of STREAM OFF command
1438 spin_lock_irqsave(&ccdc
->lsc
.req_lock
, flags
);
1440 if (ccdc
->lsc
.state
== LSC_STATE_STOPPING
)
1441 ccdc
->lsc
.state
= LSC_STATE_STOPPED
;
1443 if (__ccdc_handle_stopping(ccdc
, CCDC_EVENT_LSC_DONE
))
1446 if (ccdc
->lsc
.state
!= LSC_STATE_RECONFIG
)
1449 /* LSC is in STOPPING state, change to the new state */
1450 ccdc
->lsc
.state
= LSC_STATE_STOPPED
;
1452 /* This is an exception. Start of frame and LSC_DONE interrupt
1453 * have been received on the same time. Skip this event and wait
1456 if (events
& IRQ0STATUS_HS_VS_IRQ
)
1459 /* The LSC engine is stopped at this point. Enable it if there's a
1462 if (ccdc
->lsc
.request
== NULL
)
1465 ccdc_lsc_enable(ccdc
);
1468 spin_unlock_irqrestore(&ccdc
->lsc
.req_lock
, flags
);
1471 static int ccdc_isr_buffer(struct isp_ccdc_device
*ccdc
)
1473 struct isp_pipeline
*pipe
= to_isp_pipeline(&ccdc
->subdev
.entity
);
1474 struct isp_device
*isp
= to_isp_device(ccdc
);
1475 struct isp_buffer
*buffer
;
1478 /* The CCDC generates VD0 interrupts even when disabled (the datasheet
1479 * doesn't explicitly state if that's supposed to happen or not, so it
1480 * can be considered as a hardware bug or as a feature, but we have to
1481 * deal with it anyway). Disabling the CCDC when no buffer is available
1482 * would thus not be enough, we need to handle the situation explicitly.
1484 if (list_empty(&ccdc
->video_out
.dmaqueue
))
1487 /* We're in continuous mode, and memory writes were disabled due to a
1488 * buffer underrun. Reenable them now that we have a buffer. The buffer
1489 * address has been set in ccdc_video_queue.
1491 if (ccdc
->state
== ISP_PIPELINE_STREAM_CONTINUOUS
&& ccdc
->underrun
) {
1497 if (ccdc_sbl_wait_idle(ccdc
, 1000)) {
1498 dev_info(isp
->dev
, "CCDC won't become idle!\n");
1502 buffer
= omap3isp_video_buffer_next(&ccdc
->video_out
, ccdc
->error
);
1503 if (buffer
!= NULL
) {
1504 ccdc_set_outaddr(ccdc
, buffer
->isp_addr
);
1508 pipe
->state
|= ISP_PIPELINE_IDLE_OUTPUT
;
1510 if (ccdc
->state
== ISP_PIPELINE_STREAM_SINGLESHOT
&&
1511 isp_pipeline_ready(pipe
))
1512 omap3isp_pipeline_set_stream(pipe
,
1513 ISP_PIPELINE_STREAM_SINGLESHOT
);
1521 * ccdc_vd0_isr - Handle VD0 event
1522 * @ccdc: Pointer to ISP CCDC device.
1524 * Executes LSC deferred enablement before next frame starts.
1526 static void ccdc_vd0_isr(struct isp_ccdc_device
*ccdc
)
1528 unsigned long flags
;
1531 if (ccdc
->output
& CCDC_OUTPUT_MEMORY
)
1532 restart
= ccdc_isr_buffer(ccdc
);
1534 spin_lock_irqsave(&ccdc
->lock
, flags
);
1535 if (__ccdc_handle_stopping(ccdc
, CCDC_EVENT_VD0
)) {
1536 spin_unlock_irqrestore(&ccdc
->lock
, flags
);
1540 if (!ccdc
->shadow_update
)
1541 ccdc_apply_controls(ccdc
);
1542 spin_unlock_irqrestore(&ccdc
->lock
, flags
);
1549 * ccdc_vd1_isr - Handle VD1 event
1550 * @ccdc: Pointer to ISP CCDC device.
1552 static void ccdc_vd1_isr(struct isp_ccdc_device
*ccdc
)
1554 unsigned long flags
;
1556 spin_lock_irqsave(&ccdc
->lsc
.req_lock
, flags
);
1559 * Depending on the CCDC pipeline state, CCDC stopping should be
1560 * handled differently. In SINGLESHOT we emulate an internal CCDC
1561 * stopping because the CCDC hw works only in continuous mode.
1562 * When CONTINUOUS pipeline state is used and the CCDC writes it's
1563 * data to memory the CCDC and LSC are stopped immediately but
1564 * without change the CCDC stopping state machine. The CCDC
1565 * stopping state machine should be used only when user request
1566 * for stopping is received (SINGLESHOT is an exeption).
1568 switch (ccdc
->state
) {
1569 case ISP_PIPELINE_STREAM_SINGLESHOT
:
1570 ccdc
->stopping
= CCDC_STOP_REQUEST
;
1573 case ISP_PIPELINE_STREAM_CONTINUOUS
:
1574 if (ccdc
->output
& CCDC_OUTPUT_MEMORY
) {
1575 if (ccdc
->lsc
.state
!= LSC_STATE_STOPPED
)
1576 __ccdc_lsc_enable(ccdc
, 0);
1577 __ccdc_enable(ccdc
, 0);
1581 case ISP_PIPELINE_STREAM_STOPPED
:
1585 if (__ccdc_handle_stopping(ccdc
, CCDC_EVENT_VD1
))
1588 if (ccdc
->lsc
.request
== NULL
)
1592 * LSC need to be reconfigured. Stop it here and on next LSC_DONE IRQ
1593 * do the appropriate changes in registers
1595 if (ccdc
->lsc
.state
== LSC_STATE_RUNNING
) {
1596 __ccdc_lsc_enable(ccdc
, 0);
1597 ccdc
->lsc
.state
= LSC_STATE_RECONFIG
;
1601 /* LSC has been in STOPPED state, enable it */
1602 if (ccdc
->lsc
.state
== LSC_STATE_STOPPED
)
1603 ccdc_lsc_enable(ccdc
);
1606 spin_unlock_irqrestore(&ccdc
->lsc
.req_lock
, flags
);
1610 * omap3isp_ccdc_isr - Configure CCDC during interframe time.
1611 * @ccdc: Pointer to ISP CCDC device.
1612 * @events: CCDC events
1614 int omap3isp_ccdc_isr(struct isp_ccdc_device
*ccdc
, u32 events
)
1616 if (ccdc
->state
== ISP_PIPELINE_STREAM_STOPPED
)
1619 if (events
& IRQ0STATUS_CCDC_VD1_IRQ
)
1622 ccdc_lsc_isr(ccdc
, events
);
1624 if (events
& IRQ0STATUS_CCDC_VD0_IRQ
)
1627 if (events
& IRQ0STATUS_HS_VS_IRQ
)
1628 ccdc_hs_vs_isr(ccdc
);
1633 /* -----------------------------------------------------------------------------
1634 * ISP video operations
1637 static int ccdc_video_queue(struct isp_video
*video
, struct isp_buffer
*buffer
)
1639 struct isp_ccdc_device
*ccdc
= &video
->isp
->isp_ccdc
;
1641 if (!(ccdc
->output
& CCDC_OUTPUT_MEMORY
))
1644 ccdc_set_outaddr(ccdc
, buffer
->isp_addr
);
1646 /* We now have a buffer queued on the output, restart the pipeline
1647 * on the next CCDC interrupt if running in continuous mode (or when
1648 * starting the stream).
1655 static const struct isp_video_operations ccdc_video_ops
= {
1656 .queue
= ccdc_video_queue
,
1659 /* -----------------------------------------------------------------------------
1660 * V4L2 subdev operations
1664 * ccdc_ioctl - CCDC module private ioctl's
1665 * @sd: ISP CCDC V4L2 subdevice
1666 * @cmd: ioctl command
1667 * @arg: ioctl argument
1669 * Return 0 on success or a negative error code otherwise.
1671 static long ccdc_ioctl(struct v4l2_subdev
*sd
, unsigned int cmd
, void *arg
)
1673 struct isp_ccdc_device
*ccdc
= v4l2_get_subdevdata(sd
);
1677 case VIDIOC_OMAP3ISP_CCDC_CFG
:
1678 mutex_lock(&ccdc
->ioctl_lock
);
1679 ret
= ccdc_config(ccdc
, arg
);
1680 mutex_unlock(&ccdc
->ioctl_lock
);
1684 return -ENOIOCTLCMD
;
1690 static int ccdc_subscribe_event(struct v4l2_subdev
*sd
, struct v4l2_fh
*fh
,
1691 struct v4l2_event_subscription
*sub
)
1693 if (sub
->type
!= V4L2_EVENT_OMAP3ISP_HS_VS
)
1696 return v4l2_event_subscribe(fh
, sub
, OMAP3ISP_CCDC_NEVENTS
);
1699 static int ccdc_unsubscribe_event(struct v4l2_subdev
*sd
, struct v4l2_fh
*fh
,
1700 struct v4l2_event_subscription
*sub
)
1702 return v4l2_event_unsubscribe(fh
, sub
);
1706 * ccdc_set_stream - Enable/Disable streaming on the CCDC module
1707 * @sd: ISP CCDC V4L2 subdevice
1708 * @enable: Enable/disable stream
1710 * When writing to memory, the CCDC hardware can't be enabled without a memory
1711 * buffer to write to. As the s_stream operation is called in response to a
1712 * STREAMON call without any buffer queued yet, just update the enabled field
1713 * and return immediately. The CCDC will be enabled in ccdc_isr_buffer().
1715 * When not writing to memory enable the CCDC immediately.
1717 static int ccdc_set_stream(struct v4l2_subdev
*sd
, int enable
)
1719 struct isp_ccdc_device
*ccdc
= v4l2_get_subdevdata(sd
);
1720 struct isp_device
*isp
= to_isp_device(ccdc
);
1723 if (ccdc
->state
== ISP_PIPELINE_STREAM_STOPPED
) {
1724 if (enable
== ISP_PIPELINE_STREAM_STOPPED
)
1727 omap3isp_subclk_enable(isp
, OMAP3_ISP_SUBCLK_CCDC
);
1728 isp_reg_set(isp
, OMAP3_ISP_IOMEM_CCDC
, ISPCCDC_CFG
,
1731 ccdc_configure(ccdc
);
1733 /* TODO: Don't configure the video port if all of its output
1734 * links are inactive.
1736 ccdc_config_vp(ccdc
);
1737 ccdc_enable_vp(ccdc
, 1);
1739 ccdc_print_status(ccdc
);
1743 case ISP_PIPELINE_STREAM_CONTINUOUS
:
1744 if (ccdc
->output
& CCDC_OUTPUT_MEMORY
)
1745 omap3isp_sbl_enable(isp
, OMAP3_ISP_SBL_CCDC_WRITE
);
1747 if (ccdc
->underrun
|| !(ccdc
->output
& CCDC_OUTPUT_MEMORY
))
1753 case ISP_PIPELINE_STREAM_SINGLESHOT
:
1754 if (ccdc
->output
& CCDC_OUTPUT_MEMORY
&&
1755 ccdc
->state
!= ISP_PIPELINE_STREAM_SINGLESHOT
)
1756 omap3isp_sbl_enable(isp
, OMAP3_ISP_SBL_CCDC_WRITE
);
1761 case ISP_PIPELINE_STREAM_STOPPED
:
1762 ret
= ccdc_disable(ccdc
);
1763 if (ccdc
->output
& CCDC_OUTPUT_MEMORY
)
1764 omap3isp_sbl_disable(isp
, OMAP3_ISP_SBL_CCDC_WRITE
);
1765 omap3isp_subclk_disable(isp
, OMAP3_ISP_SUBCLK_CCDC
);
1770 ccdc
->state
= enable
;
1774 static struct v4l2_mbus_framefmt
*
1775 __ccdc_get_format(struct isp_ccdc_device
*ccdc
, struct v4l2_subdev_fh
*fh
,
1776 unsigned int pad
, enum v4l2_subdev_format_whence which
)
1778 if (which
== V4L2_SUBDEV_FORMAT_TRY
)
1779 return v4l2_subdev_get_try_format(fh
, pad
);
1781 return &ccdc
->formats
[pad
];
1785 * ccdc_try_format - Try video format on a pad
1786 * @ccdc: ISP CCDC device
1787 * @fh : V4L2 subdev file handle
1792 ccdc_try_format(struct isp_ccdc_device
*ccdc
, struct v4l2_subdev_fh
*fh
,
1793 unsigned int pad
, struct v4l2_mbus_framefmt
*fmt
,
1794 enum v4l2_subdev_format_whence which
)
1796 struct v4l2_mbus_framefmt
*format
;
1797 const struct isp_format_info
*info
;
1798 unsigned int width
= fmt
->width
;
1799 unsigned int height
= fmt
->height
;
1804 /* TODO: If the CCDC output formatter pad is connected directly
1805 * to the resizer, only YUV formats can be used.
1807 for (i
= 0; i
< ARRAY_SIZE(ccdc_fmts
); i
++) {
1808 if (fmt
->code
== ccdc_fmts
[i
])
1812 /* If not found, use SGRBG10 as default */
1813 if (i
>= ARRAY_SIZE(ccdc_fmts
))
1814 fmt
->code
= V4L2_MBUS_FMT_SGRBG10_1X10
;
1816 /* Clamp the input size. */
1817 fmt
->width
= clamp_t(u32
, width
, 32, 4096);
1818 fmt
->height
= clamp_t(u32
, height
, 32, 4096);
1821 case CCDC_PAD_SOURCE_OF
:
1822 format
= __ccdc_get_format(ccdc
, fh
, CCDC_PAD_SINK
, which
);
1823 memcpy(fmt
, format
, sizeof(*fmt
));
1825 /* The data formatter truncates the number of horizontal output
1826 * pixels to a multiple of 16. To avoid clipping data, allow
1827 * callers to request an output size bigger than the input size
1828 * up to the nearest multiple of 16.
1830 fmt
->width
= clamp_t(u32
, width
, 32, (fmt
->width
+ 15) & ~15);
1832 fmt
->height
= clamp_t(u32
, height
, 32, fmt
->height
);
1835 case CCDC_PAD_SOURCE_VP
:
1836 format
= __ccdc_get_format(ccdc
, fh
, CCDC_PAD_SINK
, which
);
1837 memcpy(fmt
, format
, sizeof(*fmt
));
1839 /* The video port interface truncates the data to 10 bits. */
1840 info
= omap3isp_video_format_info(fmt
->code
);
1841 fmt
->code
= info
->truncated
;
1843 /* The number of lines that can be clocked out from the video
1844 * port output must be at least one line less than the number
1847 fmt
->width
= clamp_t(u32
, width
, 32, fmt
->width
);
1848 fmt
->height
= clamp_t(u32
, height
, 32, fmt
->height
- 1);
1852 /* Data is written to memory unpacked, each 10-bit or 12-bit pixel is
1853 * stored on 2 bytes.
1855 fmt
->colorspace
= V4L2_COLORSPACE_SRGB
;
1856 fmt
->field
= V4L2_FIELD_NONE
;
1860 * ccdc_enum_mbus_code - Handle pixel format enumeration
1861 * @sd : pointer to v4l2 subdev structure
1862 * @fh : V4L2 subdev file handle
1863 * @code : pointer to v4l2_subdev_mbus_code_enum structure
1864 * return -EINVAL or zero on success
1866 static int ccdc_enum_mbus_code(struct v4l2_subdev
*sd
,
1867 struct v4l2_subdev_fh
*fh
,
1868 struct v4l2_subdev_mbus_code_enum
*code
)
1870 struct isp_ccdc_device
*ccdc
= v4l2_get_subdevdata(sd
);
1871 struct v4l2_mbus_framefmt
*format
;
1873 switch (code
->pad
) {
1875 if (code
->index
>= ARRAY_SIZE(ccdc_fmts
))
1878 code
->code
= ccdc_fmts
[code
->index
];
1881 case CCDC_PAD_SOURCE_OF
:
1882 case CCDC_PAD_SOURCE_VP
:
1883 /* No format conversion inside CCDC */
1884 if (code
->index
!= 0)
1887 format
= __ccdc_get_format(ccdc
, fh
, CCDC_PAD_SINK
,
1888 V4L2_SUBDEV_FORMAT_TRY
);
1890 code
->code
= format
->code
;
1900 static int ccdc_enum_frame_size(struct v4l2_subdev
*sd
,
1901 struct v4l2_subdev_fh
*fh
,
1902 struct v4l2_subdev_frame_size_enum
*fse
)
1904 struct isp_ccdc_device
*ccdc
= v4l2_get_subdevdata(sd
);
1905 struct v4l2_mbus_framefmt format
;
1907 if (fse
->index
!= 0)
1910 format
.code
= fse
->code
;
1913 ccdc_try_format(ccdc
, fh
, fse
->pad
, &format
, V4L2_SUBDEV_FORMAT_TRY
);
1914 fse
->min_width
= format
.width
;
1915 fse
->min_height
= format
.height
;
1917 if (format
.code
!= fse
->code
)
1920 format
.code
= fse
->code
;
1923 ccdc_try_format(ccdc
, fh
, fse
->pad
, &format
, V4L2_SUBDEV_FORMAT_TRY
);
1924 fse
->max_width
= format
.width
;
1925 fse
->max_height
= format
.height
;
1931 * ccdc_get_format - Retrieve the video format on a pad
1932 * @sd : ISP CCDC V4L2 subdevice
1933 * @fh : V4L2 subdev file handle
1936 * Return 0 on success or -EINVAL if the pad is invalid or doesn't correspond
1937 * to the format type.
1939 static int ccdc_get_format(struct v4l2_subdev
*sd
, struct v4l2_subdev_fh
*fh
,
1940 struct v4l2_subdev_format
*fmt
)
1942 struct isp_ccdc_device
*ccdc
= v4l2_get_subdevdata(sd
);
1943 struct v4l2_mbus_framefmt
*format
;
1945 format
= __ccdc_get_format(ccdc
, fh
, fmt
->pad
, fmt
->which
);
1949 fmt
->format
= *format
;
1954 * ccdc_set_format - Set the video format on a pad
1955 * @sd : ISP CCDC V4L2 subdevice
1956 * @fh : V4L2 subdev file handle
1959 * Return 0 on success or -EINVAL if the pad is invalid or doesn't correspond
1960 * to the format type.
1962 static int ccdc_set_format(struct v4l2_subdev
*sd
, struct v4l2_subdev_fh
*fh
,
1963 struct v4l2_subdev_format
*fmt
)
1965 struct isp_ccdc_device
*ccdc
= v4l2_get_subdevdata(sd
);
1966 struct v4l2_mbus_framefmt
*format
;
1968 format
= __ccdc_get_format(ccdc
, fh
, fmt
->pad
, fmt
->which
);
1972 ccdc_try_format(ccdc
, fh
, fmt
->pad
, &fmt
->format
, fmt
->which
);
1973 *format
= fmt
->format
;
1975 /* Propagate the format from sink to source */
1976 if (fmt
->pad
== CCDC_PAD_SINK
) {
1977 format
= __ccdc_get_format(ccdc
, fh
, CCDC_PAD_SOURCE_OF
,
1979 *format
= fmt
->format
;
1980 ccdc_try_format(ccdc
, fh
, CCDC_PAD_SOURCE_OF
, format
,
1983 format
= __ccdc_get_format(ccdc
, fh
, CCDC_PAD_SOURCE_VP
,
1985 *format
= fmt
->format
;
1986 ccdc_try_format(ccdc
, fh
, CCDC_PAD_SOURCE_VP
, format
,
1994 * ccdc_init_formats - Initialize formats on all pads
1995 * @sd: ISP CCDC V4L2 subdevice
1996 * @fh: V4L2 subdev file handle
1998 * Initialize all pad formats with default values. If fh is not NULL, try
1999 * formats are initialized on the file handle. Otherwise active formats are
2000 * initialized on the device.
2002 static int ccdc_init_formats(struct v4l2_subdev
*sd
, struct v4l2_subdev_fh
*fh
)
2004 struct v4l2_subdev_format format
;
2006 memset(&format
, 0, sizeof(format
));
2007 format
.pad
= CCDC_PAD_SINK
;
2008 format
.which
= fh
? V4L2_SUBDEV_FORMAT_TRY
: V4L2_SUBDEV_FORMAT_ACTIVE
;
2009 format
.format
.code
= V4L2_MBUS_FMT_SGRBG10_1X10
;
2010 format
.format
.width
= 4096;
2011 format
.format
.height
= 4096;
2012 ccdc_set_format(sd
, fh
, &format
);
2017 /* V4L2 subdev core operations */
2018 static const struct v4l2_subdev_core_ops ccdc_v4l2_core_ops
= {
2019 .ioctl
= ccdc_ioctl
,
2020 .subscribe_event
= ccdc_subscribe_event
,
2021 .unsubscribe_event
= ccdc_unsubscribe_event
,
2024 /* V4L2 subdev video operations */
2025 static const struct v4l2_subdev_video_ops ccdc_v4l2_video_ops
= {
2026 .s_stream
= ccdc_set_stream
,
2029 /* V4L2 subdev pad operations */
2030 static const struct v4l2_subdev_pad_ops ccdc_v4l2_pad_ops
= {
2031 .enum_mbus_code
= ccdc_enum_mbus_code
,
2032 .enum_frame_size
= ccdc_enum_frame_size
,
2033 .get_fmt
= ccdc_get_format
,
2034 .set_fmt
= ccdc_set_format
,
2037 /* V4L2 subdev operations */
2038 static const struct v4l2_subdev_ops ccdc_v4l2_ops
= {
2039 .core
= &ccdc_v4l2_core_ops
,
2040 .video
= &ccdc_v4l2_video_ops
,
2041 .pad
= &ccdc_v4l2_pad_ops
,
2044 /* V4L2 subdev internal operations */
2045 static const struct v4l2_subdev_internal_ops ccdc_v4l2_internal_ops
= {
2046 .open
= ccdc_init_formats
,
2049 /* -----------------------------------------------------------------------------
2050 * Media entity operations
2054 * ccdc_link_setup - Setup CCDC connections
2055 * @entity: CCDC media entity
2056 * @local: Pad at the local end of the link
2057 * @remote: Pad at the remote end of the link
2058 * @flags: Link flags
2060 * return -EINVAL or zero on success
2062 static int ccdc_link_setup(struct media_entity
*entity
,
2063 const struct media_pad
*local
,
2064 const struct media_pad
*remote
, u32 flags
)
2066 struct v4l2_subdev
*sd
= media_entity_to_v4l2_subdev(entity
);
2067 struct isp_ccdc_device
*ccdc
= v4l2_get_subdevdata(sd
);
2068 struct isp_device
*isp
= to_isp_device(ccdc
);
2070 switch (local
->index
| media_entity_type(remote
->entity
)) {
2071 case CCDC_PAD_SINK
| MEDIA_ENT_T_V4L2_SUBDEV
:
2072 /* Read from the sensor (parallel interface), CCP2, CSI2a or
2075 if (!(flags
& MEDIA_LNK_FL_ENABLED
)) {
2076 ccdc
->input
= CCDC_INPUT_NONE
;
2080 if (ccdc
->input
!= CCDC_INPUT_NONE
)
2083 if (remote
->entity
== &isp
->isp_ccp2
.subdev
.entity
)
2084 ccdc
->input
= CCDC_INPUT_CCP2B
;
2085 else if (remote
->entity
== &isp
->isp_csi2a
.subdev
.entity
)
2086 ccdc
->input
= CCDC_INPUT_CSI2A
;
2087 else if (remote
->entity
== &isp
->isp_csi2c
.subdev
.entity
)
2088 ccdc
->input
= CCDC_INPUT_CSI2C
;
2090 ccdc
->input
= CCDC_INPUT_PARALLEL
;
2095 * The ISP core doesn't support pipelines with multiple video outputs.
2096 * Revisit this when it will be implemented, and return -EBUSY for now.
2099 case CCDC_PAD_SOURCE_VP
| MEDIA_ENT_T_V4L2_SUBDEV
:
2100 /* Write to preview engine, histogram and H3A. When none of
2101 * those links are active, the video port can be disabled.
2103 if (flags
& MEDIA_LNK_FL_ENABLED
) {
2104 if (ccdc
->output
& ~CCDC_OUTPUT_PREVIEW
)
2106 ccdc
->output
|= CCDC_OUTPUT_PREVIEW
;
2108 ccdc
->output
&= ~CCDC_OUTPUT_PREVIEW
;
2112 case CCDC_PAD_SOURCE_OF
| MEDIA_ENT_T_DEVNODE
:
2113 /* Write to memory */
2114 if (flags
& MEDIA_LNK_FL_ENABLED
) {
2115 if (ccdc
->output
& ~CCDC_OUTPUT_MEMORY
)
2117 ccdc
->output
|= CCDC_OUTPUT_MEMORY
;
2119 ccdc
->output
&= ~CCDC_OUTPUT_MEMORY
;
2123 case CCDC_PAD_SOURCE_OF
| MEDIA_ENT_T_V4L2_SUBDEV
:
2124 /* Write to resizer */
2125 if (flags
& MEDIA_LNK_FL_ENABLED
) {
2126 if (ccdc
->output
& ~CCDC_OUTPUT_RESIZER
)
2128 ccdc
->output
|= CCDC_OUTPUT_RESIZER
;
2130 ccdc
->output
&= ~CCDC_OUTPUT_RESIZER
;
2141 /* media operations */
2142 static const struct media_entity_operations ccdc_media_ops
= {
2143 .link_setup
= ccdc_link_setup
,
2147 * ccdc_init_entities - Initialize V4L2 subdev and media entity
2148 * @ccdc: ISP CCDC module
2150 * Return 0 on success and a negative error code on failure.
2152 static int ccdc_init_entities(struct isp_ccdc_device
*ccdc
)
2154 struct v4l2_subdev
*sd
= &ccdc
->subdev
;
2155 struct media_pad
*pads
= ccdc
->pads
;
2156 struct media_entity
*me
= &sd
->entity
;
2159 ccdc
->input
= CCDC_INPUT_NONE
;
2161 v4l2_subdev_init(sd
, &ccdc_v4l2_ops
);
2162 sd
->internal_ops
= &ccdc_v4l2_internal_ops
;
2163 strlcpy(sd
->name
, "OMAP3 ISP CCDC", sizeof(sd
->name
));
2164 sd
->grp_id
= 1 << 16; /* group ID for isp subdevs */
2165 v4l2_set_subdevdata(sd
, ccdc
);
2166 sd
->flags
|= V4L2_SUBDEV_FL_HAS_EVENTS
| V4L2_SUBDEV_FL_HAS_DEVNODE
;
2168 pads
[CCDC_PAD_SINK
].flags
= MEDIA_PAD_FL_SINK
;
2169 pads
[CCDC_PAD_SOURCE_VP
].flags
= MEDIA_PAD_FL_SOURCE
;
2170 pads
[CCDC_PAD_SOURCE_OF
].flags
= MEDIA_PAD_FL_SOURCE
;
2172 me
->ops
= &ccdc_media_ops
;
2173 ret
= media_entity_init(me
, CCDC_PADS_NUM
, pads
, 0);
2177 ccdc_init_formats(sd
, NULL
);
2179 ccdc
->video_out
.type
= V4L2_BUF_TYPE_VIDEO_CAPTURE
;
2180 ccdc
->video_out
.ops
= &ccdc_video_ops
;
2181 ccdc
->video_out
.isp
= to_isp_device(ccdc
);
2182 ccdc
->video_out
.capture_mem
= PAGE_ALIGN(4096 * 4096) * 3;
2183 ccdc
->video_out
.bpl_alignment
= 32;
2185 ret
= omap3isp_video_init(&ccdc
->video_out
, "CCDC");
2189 /* Connect the CCDC subdev to the video node. */
2190 ret
= media_entity_create_link(&ccdc
->subdev
.entity
, CCDC_PAD_SOURCE_OF
,
2191 &ccdc
->video_out
.video
.entity
, 0, 0);
2198 void omap3isp_ccdc_unregister_entities(struct isp_ccdc_device
*ccdc
)
2200 media_entity_cleanup(&ccdc
->subdev
.entity
);
2202 v4l2_device_unregister_subdev(&ccdc
->subdev
);
2203 omap3isp_video_unregister(&ccdc
->video_out
);
2206 int omap3isp_ccdc_register_entities(struct isp_ccdc_device
*ccdc
,
2207 struct v4l2_device
*vdev
)
2211 /* Register the subdev and video node. */
2212 ret
= v4l2_device_register_subdev(vdev
, &ccdc
->subdev
);
2216 ret
= omap3isp_video_register(&ccdc
->video_out
, vdev
);
2223 omap3isp_ccdc_unregister_entities(ccdc
);
2227 /* -----------------------------------------------------------------------------
2228 * ISP CCDC initialisation and cleanup
2232 * omap3isp_ccdc_init - CCDC module initialization.
2233 * @dev: Device pointer specific to the OMAP3 ISP.
2235 * TODO: Get the initialisation values from platform data.
2237 * Return 0 on success or a negative error code otherwise.
2239 int omap3isp_ccdc_init(struct isp_device
*isp
)
2241 struct isp_ccdc_device
*ccdc
= &isp
->isp_ccdc
;
2243 spin_lock_init(&ccdc
->lock
);
2244 init_waitqueue_head(&ccdc
->wait
);
2245 mutex_init(&ccdc
->ioctl_lock
);
2247 ccdc
->stopping
= CCDC_STOP_NOT_REQUESTED
;
2249 INIT_WORK(&ccdc
->lsc
.table_work
, ccdc_lsc_free_table_work
);
2250 ccdc
->lsc
.state
= LSC_STATE_STOPPED
;
2251 INIT_LIST_HEAD(&ccdc
->lsc
.free_queue
);
2252 spin_lock_init(&ccdc
->lsc
.req_lock
);
2254 ccdc
->syncif
.ccdc_mastermode
= 0;
2255 ccdc
->syncif
.datapol
= 0;
2256 ccdc
->syncif
.datsz
= 0;
2257 ccdc
->syncif
.fldmode
= 0;
2258 ccdc
->syncif
.fldout
= 0;
2259 ccdc
->syncif
.fldpol
= 0;
2260 ccdc
->syncif
.fldstat
= 0;
2262 ccdc
->clamp
.oblen
= 0;
2263 ccdc
->clamp
.dcsubval
= 0;
2265 ccdc
->vpcfg
.pixelclk
= 0;
2267 ccdc
->update
= OMAP3ISP_CCDC_BLCLAMP
;
2268 ccdc_apply_controls(ccdc
);
2270 return ccdc_init_entities(ccdc
);
2274 * omap3isp_ccdc_cleanup - CCDC module cleanup.
2275 * @dev: Device pointer specific to the OMAP3 ISP.
2277 void omap3isp_ccdc_cleanup(struct isp_device
*isp
)
2279 struct isp_ccdc_device
*ccdc
= &isp
->isp_ccdc
;
2281 /* Free LSC requests. As the CCDC is stopped there's no active request,
2282 * so only the pending request and the free queue need to be handled.
2284 ccdc_lsc_free_request(ccdc
, ccdc
->lsc
.request
);
2285 cancel_work_sync(&ccdc
->lsc
.table_work
);
2286 ccdc_lsc_free_queue(ccdc
, &ccdc
->lsc
.free_queue
);
2288 if (ccdc
->fpc
.fpcaddr
!= 0)
2289 iommu_vfree(isp
->iommu
, ccdc
->fpc
.fpcaddr
);